1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/interconnect/qcom,bcm-voter.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Qualcomm BCM-Voter Interconnect 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Georgi Djakov <georgi.djakov@linaro.org> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun The Bus Clock Manager (BCM) is a dedicated hardware accelerator that manages 14*4882a593Smuzhiyun shared system resources by aggregating requests from multiple Resource State 15*4882a593Smuzhiyun Coordinators (RSC). Interconnect providers are able to vote for aggregated 16*4882a593Smuzhiyun thresholds values from consumers by communicating through their respective 17*4882a593Smuzhiyun RSCs. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunproperties: 20*4882a593Smuzhiyun compatible: 21*4882a593Smuzhiyun enum: 22*4882a593Smuzhiyun - qcom,bcm-voter 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun qcom,tcs-wait: 25*4882a593Smuzhiyun description: | 26*4882a593Smuzhiyun Optional mask of which TCSs (Triggered Command Sets) wait for completion 27*4882a593Smuzhiyun upon triggering. If not specified, then the AMC and WAKE sets wait for 28*4882a593Smuzhiyun completion. The mask bits are available in the QCOM_ICC_TAG_* defines. 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun The AMC TCS is triggered immediately when icc_set_bw() is called. The 31*4882a593Smuzhiyun WAKE/SLEEP TCSs are triggered when the RSC transitions between active and 32*4882a593Smuzhiyun sleep modes. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun In most cases, it's necessary to wait in both the AMC and WAKE sets to 35*4882a593Smuzhiyun ensure resources are available before use. If a specific RSC and its use 36*4882a593Smuzhiyun cases can ensure sufficient delay by other means, then this can be 37*4882a593Smuzhiyun overridden to reduce latencies. 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32 40*4882a593Smuzhiyun 41*4882a593Smuzhiyunrequired: 42*4882a593Smuzhiyun - compatible 43*4882a593Smuzhiyun 44*4882a593SmuzhiyunadditionalProperties: false 45*4882a593Smuzhiyun 46*4882a593Smuzhiyunexamples: 47*4882a593Smuzhiyun # Example 1: apps bcm_voter on SDM845 SoC should be defined inside &apps_rsc node 48*4882a593Smuzhiyun # as defined in Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt 49*4882a593Smuzhiyun - | 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun apps_bcm_voter: bcm_voter { 52*4882a593Smuzhiyun compatible = "qcom,bcm-voter"; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun # Example 2: disp bcm_voter on SDM845 should be defined inside &disp_rsc node 56*4882a593Smuzhiyun # as defined in Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt 57*4882a593Smuzhiyun - | 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #include <dt-bindings/interconnect/qcom,icc.h> 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun disp_bcm_voter: bcm_voter { 62*4882a593Smuzhiyun compatible = "qcom,bcm-voter"; 63*4882a593Smuzhiyun qcom,tcs-wait = <QCOM_ICC_TAG_AMC>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun... 66