1*4882a593Smuzhiyun* TI - TSC ADC (Touschscreen and analog digital converter) 2*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun- mfd 6*4882a593Smuzhiyun compatible: Should be 7*4882a593Smuzhiyun "ti,am3359-tscadc" for AM335x/AM437x SoCs 8*4882a593Smuzhiyun "ti,am654-tscadc", "ti,am3359-tscadc" for AM654 SoCs 9*4882a593Smuzhiyun- child "tsc" 10*4882a593Smuzhiyun compatible: Should be "ti,am3359-tsc". 11*4882a593Smuzhiyun ti,wires: Wires refer to application modes i.e. 4/5/8 wire touchscreen 12*4882a593Smuzhiyun support on the platform. 13*4882a593Smuzhiyun ti,x-plate-resistance: X plate resistance 14*4882a593Smuzhiyun ti,coordinate-readouts: The sequencer supports a total of 16 15*4882a593Smuzhiyun programmable steps each step is used to 16*4882a593Smuzhiyun read a single coordinate. A single 17*4882a593Smuzhiyun readout is enough but multiple reads can 18*4882a593Smuzhiyun increase the quality. 19*4882a593Smuzhiyun A value of 5 means, 5 reads for X, 5 for 20*4882a593Smuzhiyun Y and 2 for Z (always). This utilises 12 21*4882a593Smuzhiyun of the 16 software steps available. The 22*4882a593Smuzhiyun remaining 4 can be used by the ADC. 23*4882a593Smuzhiyun ti,wire-config: Different boards could have a different order for 24*4882a593Smuzhiyun connecting wires on touchscreen. We need to provide an 25*4882a593Smuzhiyun 8 bit number where in the 1st four bits represent the 26*4882a593Smuzhiyun analog lines and the next 4 bits represent positive/ 27*4882a593Smuzhiyun negative terminal on that input line. Notations to 28*4882a593Smuzhiyun represent the input lines and terminals resoectively 29*4882a593Smuzhiyun is as follows: 30*4882a593Smuzhiyun AIN0 = 0, AIN1 = 1 and so on till AIN7 = 7. 31*4882a593Smuzhiyun XP = 0, XN = 1, YP = 2, YN = 3. 32*4882a593Smuzhiyun- child "adc" 33*4882a593Smuzhiyun compatible: Should be 34*4882a593Smuzhiyun "ti,am3359-adc" for AM335x/AM437x SoCs 35*4882a593Smuzhiyun "ti,am654-adc", "ti,am3359-adc" for AM654 SoCs 36*4882a593Smuzhiyun ti,adc-channels: List of analog inputs available for ADC. 37*4882a593Smuzhiyun AIN0 = 0, AIN1 = 1 and so on till AIN7 = 7. 38*4882a593Smuzhiyun 39*4882a593SmuzhiyunOptional properties: 40*4882a593Smuzhiyun- child "tsc" 41*4882a593Smuzhiyun ti,charge-delay: Length of touch screen charge delay step in terms of 42*4882a593Smuzhiyun ADC clock cycles. Charge delay value should be large 43*4882a593Smuzhiyun in order to avoid false pen-up events. This value 44*4882a593Smuzhiyun effects the overall sampling speed, hence need to be 45*4882a593Smuzhiyun kept as low as possible, while avoiding false pen-up 46*4882a593Smuzhiyun event. Start from a lower value, say 0x400, and 47*4882a593Smuzhiyun increase value until false pen-up events are avoided. 48*4882a593Smuzhiyun The pen-up detection happens immediately after the 49*4882a593Smuzhiyun charge step, so this does in fact function as a 50*4882a593Smuzhiyun hardware knob for adjusting the amount of "settling 51*4882a593Smuzhiyun time". 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun- child "adc" 54*4882a593Smuzhiyun ti,chan-step-opendelay: List of open delays for each channel of 55*4882a593Smuzhiyun ADC in the order of ti,adc-channels. The 56*4882a593Smuzhiyun value corresponds to the number of ADC 57*4882a593Smuzhiyun clock cycles to wait after applying the 58*4882a593Smuzhiyun step configuration registers and before 59*4882a593Smuzhiyun sending the start of ADC conversion. 60*4882a593Smuzhiyun Maximum value is 0x3FFFF. 61*4882a593Smuzhiyun ti,chan-step-sampledelay: List of sample delays for each channel 62*4882a593Smuzhiyun of ADC in the order of ti,adc-channels. 63*4882a593Smuzhiyun The value corresponds to the number of 64*4882a593Smuzhiyun ADC clock cycles to sample (to hold 65*4882a593Smuzhiyun start of conversion high). 66*4882a593Smuzhiyun Maximum value is 0xFF. 67*4882a593Smuzhiyun ti,chan-step-avg: Number of averages to be performed for each 68*4882a593Smuzhiyun channel of ADC. If average is 16 then input 69*4882a593Smuzhiyun is sampled 16 times and averaged to get more 70*4882a593Smuzhiyun accurate value. This increases the time taken 71*4882a593Smuzhiyun by ADC to generate a sample. Valid range is 0 72*4882a593Smuzhiyun average to 16 averages. Maximum value is 16. 73*4882a593Smuzhiyun 74*4882a593SmuzhiyunExample: 75*4882a593Smuzhiyun tscadc: tscadc@44e0d000 { 76*4882a593Smuzhiyun compatible = "ti,am3359-tscadc"; 77*4882a593Smuzhiyun tsc { 78*4882a593Smuzhiyun ti,wires = <4>; 79*4882a593Smuzhiyun ti,x-plate-resistance = <200>; 80*4882a593Smuzhiyun ti,coordiante-readouts = <5>; 81*4882a593Smuzhiyun ti,wire-config = <0x00 0x11 0x22 0x33>; 82*4882a593Smuzhiyun ti,charge-delay = <0x400>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun adc { 86*4882a593Smuzhiyun ti,adc-channels = <4 5 6 7>; 87*4882a593Smuzhiyun ti,chan-step-opendelay = <0x098 0x3ffff 0x098 0x0>; 88*4882a593Smuzhiyun ti,chan-step-sampledelay = <0xff 0x0 0xf 0x0>; 89*4882a593Smuzhiyun ti,chan-step-avg = <16 2 4 8>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun } 92