1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/iio/frequency/adf4371.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Analog Devices ADF4371/ADF4372 Wideband Synthesizers 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Popa Stefan <stefan.popa@analog.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun Analog Devices ADF4371/ADF4372 SPI Wideband Synthesizers 14*4882a593Smuzhiyun https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf 15*4882a593Smuzhiyun https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdf 16*4882a593Smuzhiyun 17*4882a593Smuzhiyunproperties: 18*4882a593Smuzhiyun compatible: 19*4882a593Smuzhiyun enum: 20*4882a593Smuzhiyun - adi,adf4371 21*4882a593Smuzhiyun - adi,adf4372 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun reg: 24*4882a593Smuzhiyun maxItems: 1 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun clocks: 27*4882a593Smuzhiyun description: 28*4882a593Smuzhiyun Definition of the external clock (see clock/clock-bindings.txt) 29*4882a593Smuzhiyun maxItems: 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun clock-names: 32*4882a593Smuzhiyun description: 33*4882a593Smuzhiyun Must be "clkin" 34*4882a593Smuzhiyun maxItems: 1 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun adi,mute-till-lock-en: 37*4882a593Smuzhiyun type: boolean 38*4882a593Smuzhiyun description: 39*4882a593Smuzhiyun If this property is present, then the supply current to RF8P and RF8N 40*4882a593Smuzhiyun output stage will shut down until the ADF4371/ADF4372 achieves lock as 41*4882a593Smuzhiyun measured by the digital lock detect circuitry. 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun spi-max-frequency: true 44*4882a593Smuzhiyun 45*4882a593Smuzhiyunrequired: 46*4882a593Smuzhiyun - compatible 47*4882a593Smuzhiyun - reg 48*4882a593Smuzhiyun - clocks 49*4882a593Smuzhiyun - clock-names 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunadditionalProperties: false 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunexamples: 54*4882a593Smuzhiyun - | 55*4882a593Smuzhiyun spi0 { 56*4882a593Smuzhiyun #address-cells = <1>; 57*4882a593Smuzhiyun #size-cells = <0>; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun frequency@0 { 60*4882a593Smuzhiyun compatible = "adi,adf4371"; 61*4882a593Smuzhiyun reg = <0>; 62*4882a593Smuzhiyun spi-max-frequency = <1000000>; 63*4882a593Smuzhiyun clocks = <&adf4371_clkin>; 64*4882a593Smuzhiyun clock-names = "clkin"; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun... 68