1*4882a593SmuzhiyunAnalog Devices AD5592R/AD5593R DAC/ADC device driver 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties for the AD5592R: 4*4882a593Smuzhiyun - compatible: Must be "adi,ad5592r" 5*4882a593Smuzhiyun - reg: SPI chip select number for the device 6*4882a593Smuzhiyun - spi-max-frequency: Max SPI frequency to use (< 30000000) 7*4882a593Smuzhiyun - spi-cpol: The AD5592R requires inverse clock polarity (CPOL) mode 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunRequired properties for the AD5593R: 10*4882a593Smuzhiyun - compatible: Must be "adi,ad5593r" 11*4882a593Smuzhiyun - reg: I2C address of the device 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunRequired properties for all supported chips: 14*4882a593Smuzhiyun - #address-cells: Should be 1. 15*4882a593Smuzhiyun - #size-cells: Should be 0. 16*4882a593Smuzhiyun - channel nodes: 17*4882a593Smuzhiyun Each child node represents one channel and has the following 18*4882a593Smuzhiyun Required properties: 19*4882a593Smuzhiyun * reg: Pin on which this channel is connected to. 20*4882a593Smuzhiyun * adi,mode: Mode or function of this channel. 21*4882a593Smuzhiyun Macros specifying the valid values 22*4882a593Smuzhiyun can be found in <dt-bindings/iio/adi,ad5592r.h>. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun The following values are currently supported: 25*4882a593Smuzhiyun * CH_MODE_UNUSED (the pin is unused) 26*4882a593Smuzhiyun * CH_MODE_ADC (the pin is ADC input) 27*4882a593Smuzhiyun * CH_MODE_DAC (the pin is DAC output) 28*4882a593Smuzhiyun * CH_MODE_DAC_AND_ADC (the pin is DAC output 29*4882a593Smuzhiyun but can be monitored by an ADC, since 30*4882a593Smuzhiyun there is no disadvantage this 31*4882a593Smuzhiyun this should be considered as the 32*4882a593Smuzhiyun preferred DAC mode) 33*4882a593Smuzhiyun * CH_MODE_GPIO (the pin is registered 34*4882a593Smuzhiyun with GPIOLIB) 35*4882a593Smuzhiyun Optional properties: 36*4882a593Smuzhiyun * adi,off-state: State of this channel when unused or the 37*4882a593Smuzhiyun device gets removed. Macros specifying the 38*4882a593Smuzhiyun valid values can be found in 39*4882a593Smuzhiyun <dt-bindings/iio/adi,ad5592r.h>. 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun * CH_OFFSTATE_PULLDOWN (the pin is pulled down) 42*4882a593Smuzhiyun * CH_OFFSTATE_OUT_LOW (the pin is output low) 43*4882a593Smuzhiyun * CH_OFFSTATE_OUT_HIGH (the pin is output high) 44*4882a593Smuzhiyun * CH_OFFSTATE_OUT_TRISTATE (the pin is 45*4882a593Smuzhiyun tristated output) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun 48*4882a593SmuzhiyunOptional properties: 49*4882a593Smuzhiyun - vref-supply: Phandle to the external reference voltage supply. This should 50*4882a593Smuzhiyun only be set if there is an external reference voltage connected to the VREF 51*4882a593Smuzhiyun pin. If the property is not set the internal 2.5V reference is used. 52*4882a593Smuzhiyun - reset-gpios : GPIO spec for the RESET pin. If specified, it will be 53*4882a593Smuzhiyun asserted during driver probe. 54*4882a593Smuzhiyun - gpio-controller: Marks the device node as a GPIO controller. 55*4882a593Smuzhiyun - #gpio-cells: Should be 2. The first cell is the GPIO number and the second 56*4882a593Smuzhiyun cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. 57*4882a593Smuzhiyun 58*4882a593SmuzhiyunAD5592R Example: 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #include <dt-bindings/iio/adi,ad5592r.h> 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun vref: regulator-vref { 63*4882a593Smuzhiyun compatible = "regulator-fixed"; 64*4882a593Smuzhiyun regulator-name = "vref-ad559x"; 65*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 66*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 67*4882a593Smuzhiyun regulator-always-on; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun ad5592r@0 { 71*4882a593Smuzhiyun #size-cells = <0>; 72*4882a593Smuzhiyun #address-cells = <1>; 73*4882a593Smuzhiyun #gpio-cells = <2>; 74*4882a593Smuzhiyun compatible = "adi,ad5592r"; 75*4882a593Smuzhiyun reg = <0>; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun spi-max-frequency = <1000000>; 78*4882a593Smuzhiyun spi-cpol; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun vref-supply = <&vref>; /* optional */ 81*4882a593Smuzhiyun reset-gpios = <&gpio0 86 0>; /* optional */ 82*4882a593Smuzhiyun gpio-controller; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun channel@0 { 85*4882a593Smuzhiyun reg = <0>; 86*4882a593Smuzhiyun adi,mode = <CH_MODE_DAC>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun channel@1 { 89*4882a593Smuzhiyun reg = <1>; 90*4882a593Smuzhiyun adi,mode = <CH_MODE_ADC>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun channel@2 { 93*4882a593Smuzhiyun reg = <2>; 94*4882a593Smuzhiyun adi,mode = <CH_MODE_DAC_AND_ADC>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun channel@3 { 97*4882a593Smuzhiyun reg = <3>; 98*4882a593Smuzhiyun adi,mode = <CH_MODE_DAC_AND_ADC>; 99*4882a593Smuzhiyun adi,off-state = <CH_OFFSTATE_PULLDOWN>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun channel@4 { 102*4882a593Smuzhiyun reg = <4>; 103*4882a593Smuzhiyun adi,mode = <CH_MODE_UNUSED>; 104*4882a593Smuzhiyun adi,off-state = <CH_OFFSTATE_PULLDOWN>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun channel@5 { 107*4882a593Smuzhiyun reg = <5>; 108*4882a593Smuzhiyun adi,mode = <CH_MODE_GPIO>; 109*4882a593Smuzhiyun adi,off-state = <CH_OFFSTATE_PULLDOWN>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun channel@6 { 112*4882a593Smuzhiyun reg = <6>; 113*4882a593Smuzhiyun adi,mode = <CH_MODE_GPIO>; 114*4882a593Smuzhiyun adi,off-state = <CH_OFFSTATE_PULLDOWN>; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun channel@7 { 117*4882a593Smuzhiyun reg = <7>; 118*4882a593Smuzhiyun adi,mode = <CH_MODE_GPIO>; 119*4882a593Smuzhiyun adi,off-state = <CH_OFFSTATE_PULLDOWN>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593SmuzhiyunAD5593R Example: 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun #include <dt-bindings/iio/adi,ad5592r.h> 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun ad5593r@10 { 128*4882a593Smuzhiyun #size-cells = <0>; 129*4882a593Smuzhiyun #address-cells = <1>; 130*4882a593Smuzhiyun #gpio-cells = <2>; 131*4882a593Smuzhiyun compatible = "adi,ad5593r"; 132*4882a593Smuzhiyun reg = <0x10>; 133*4882a593Smuzhiyun gpio-controller; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun channel@0 { 136*4882a593Smuzhiyun reg = <0>; 137*4882a593Smuzhiyun adi,mode = <CH_MODE_DAC>; 138*4882a593Smuzhiyun adi,off-state = <CH_OFFSTATE_PULLDOWN>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun channel@1 { 141*4882a593Smuzhiyun reg = <1>; 142*4882a593Smuzhiyun adi,mode = <CH_MODE_ADC>; 143*4882a593Smuzhiyun adi,off-state = <CH_OFFSTATE_PULLDOWN>; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun channel@2 { 146*4882a593Smuzhiyun reg = <2>; 147*4882a593Smuzhiyun adi,mode = <CH_MODE_DAC_AND_ADC>; 148*4882a593Smuzhiyun adi,off-state = <CH_OFFSTATE_PULLDOWN>; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun channel@6 { 151*4882a593Smuzhiyun reg = <6>; 152*4882a593Smuzhiyun adi,mode = <CH_MODE_GPIO>; 153*4882a593Smuzhiyun adi,off-state = <CH_OFFSTATE_PULLDOWN>; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun }; 156