xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: STMicroelectronics STM32 DFSDM ADC device driver
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Fabrice Gasnier <fabrice.gasnier@st.com>
11*4882a593Smuzhiyun  - Olivier Moysan <olivier.moysan@st.com>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundescription: |
14*4882a593Smuzhiyun  STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
15*4882a593Smuzhiyun  interface external sigma delta modulators to STM32 micro controllers.
16*4882a593Smuzhiyun  It is mainly targeted for:
17*4882a593Smuzhiyun  - Sigma delta modulators (motor control, metering...)
18*4882a593Smuzhiyun  - PDM microphones (audio digital microphone)
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun  It features up to 8 serial digital interfaces (SPI or Manchester) and
21*4882a593Smuzhiyun  up to 4 filters on stm32h7 or 6 filters on stm32mp1.
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun  Each child node matches with a filter instance.
24*4882a593Smuzhiyun
25*4882a593Smuzhiyunproperties:
26*4882a593Smuzhiyun  compatible:
27*4882a593Smuzhiyun    enum:
28*4882a593Smuzhiyun      - st,stm32h7-dfsdm
29*4882a593Smuzhiyun      - st,stm32mp1-dfsdm
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun  reg:
32*4882a593Smuzhiyun    maxItems: 1
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun  clocks:
35*4882a593Smuzhiyun    items:
36*4882a593Smuzhiyun      - description:
37*4882a593Smuzhiyun          Internal clock used for DFSDM digital processing and control blocks.
38*4882a593Smuzhiyun          dfsdm clock can also feed CLKOUT, when CLKOUT is used.
39*4882a593Smuzhiyun      - description: audio clock can be used as an alternate to feed CLKOUT.
40*4882a593Smuzhiyun    minItems: 1
41*4882a593Smuzhiyun    maxItems: 2
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun  clock-names:
44*4882a593Smuzhiyun    items:
45*4882a593Smuzhiyun      - const: dfsdm
46*4882a593Smuzhiyun      - const: audio
47*4882a593Smuzhiyun    minItems: 1
48*4882a593Smuzhiyun    maxItems: 2
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun  "#address-cells":
51*4882a593Smuzhiyun    const: 1
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun  "#size-cells":
54*4882a593Smuzhiyun    const: 0
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun  spi-max-frequency:
57*4882a593Smuzhiyun    description:
58*4882a593Smuzhiyun      SPI clock OUT frequency (Hz). Requested only for SPI master mode.
59*4882a593Smuzhiyun      This clock must be set according to the "clock" property.
60*4882a593Smuzhiyun      Frequency must be a multiple of the rcc clock frequency.
61*4882a593Smuzhiyun      If not, SPI CLKOUT frequency will not be accurate.
62*4882a593Smuzhiyun    maximum: 20000000
63*4882a593Smuzhiyun
64*4882a593Smuzhiyunrequired:
65*4882a593Smuzhiyun  - compatible
66*4882a593Smuzhiyun  - reg
67*4882a593Smuzhiyun  - clocks
68*4882a593Smuzhiyun  - clock-names
69*4882a593Smuzhiyun  - "#address-cells"
70*4882a593Smuzhiyun  - "#size-cells"
71*4882a593Smuzhiyun
72*4882a593SmuzhiyunadditionalProperties: false
73*4882a593Smuzhiyun
74*4882a593SmuzhiyunpatternProperties:
75*4882a593Smuzhiyun  "^filter@[0-9]+$":
76*4882a593Smuzhiyun    type: object
77*4882a593Smuzhiyun    description: child node
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun    properties:
80*4882a593Smuzhiyun      compatible:
81*4882a593Smuzhiyun        enum:
82*4882a593Smuzhiyun          - st,stm32-dfsdm-adc
83*4882a593Smuzhiyun          - st,stm32-dfsdm-dmic
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun      reg:
86*4882a593Smuzhiyun        description: Specifies the DFSDM filter instance used.
87*4882a593Smuzhiyun        maxItems: 1
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun      interrupts:
90*4882a593Smuzhiyun        maxItems: 1
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun      st,adc-channels:
93*4882a593Smuzhiyun        description: |
94*4882a593Smuzhiyun          List of single-ended channels muxed for this ADC.
95*4882a593Smuzhiyun          On stm32h7 and stm32mp1:
96*4882a593Smuzhiyun          - For st,stm32-dfsdm-adc: up to 8 channels numbered from 0 to 7.
97*4882a593Smuzhiyun          - For st,stm32-dfsdm-dmic: 1 channel numbered from 0 to 7.
98*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32-array
99*4882a593Smuzhiyun        items:
100*4882a593Smuzhiyun          minimum: 0
101*4882a593Smuzhiyun          maximum: 7
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun      st,adc-channel-names:
104*4882a593Smuzhiyun        description: List of single-ended channel names.
105*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/string-array
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun      st,filter-order:
108*4882a593Smuzhiyun        description: |
109*4882a593Smuzhiyun          SinC filter order from 0 to 5.
110*4882a593Smuzhiyun          - 0: FastSinC
111*4882a593Smuzhiyun          - [1-5]: order 1 to 5.
112*4882a593Smuzhiyun          For audio purpose it is recommended to use order 3 to 5.
113*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32
114*4882a593Smuzhiyun        items:
115*4882a593Smuzhiyun          minimum: 0
116*4882a593Smuzhiyun          maximum: 5
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun      "#io-channel-cells":
119*4882a593Smuzhiyun        const: 1
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun      st,adc-channel-types:
122*4882a593Smuzhiyun        description: |
123*4882a593Smuzhiyun          Single-ended channel input type.
124*4882a593Smuzhiyun          - "SPI_R": SPI with data on rising edge (default)
125*4882a593Smuzhiyun          - "SPI_F": SPI with data on falling edge
126*4882a593Smuzhiyun          - "MANCH_R": manchester codec, rising edge = logic 0, falling edge = logic 1
127*4882a593Smuzhiyun          - "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0
128*4882a593Smuzhiyun        items:
129*4882a593Smuzhiyun          enum: [ SPI_R, SPI_F, MANCH_R, MANCH_F ]
130*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/non-unique-string-array
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun      st,adc-channel-clk-src:
133*4882a593Smuzhiyun        description: |
134*4882a593Smuzhiyun          Conversion clock source.
135*4882a593Smuzhiyun          - "CLKIN": external SPI clock (CLKIN x)
136*4882a593Smuzhiyun          - "CLKOUT": internal SPI clock (CLKOUT) (default)
137*4882a593Smuzhiyun          - "CLKOUT_F": internal SPI clock divided by 2 (falling edge).
138*4882a593Smuzhiyun          - "CLKOUT_R": internal SPI clock divided by 2 (rising edge).
139*4882a593Smuzhiyun        items:
140*4882a593Smuzhiyun          enum: [ CLKIN, CLKOUT, CLKOUT_F, CLKOUT_R ]
141*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/non-unique-string-array
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun      st,adc-alt-channel:
144*4882a593Smuzhiyun        description:
145*4882a593Smuzhiyun          Must be defined if two sigma delta modulators are
146*4882a593Smuzhiyun          connected on same SPI input.
147*4882a593Smuzhiyun          If not set, channel n is connected to SPI input n.
148*4882a593Smuzhiyun          If set, channel n is connected to SPI input n + 1.
149*4882a593Smuzhiyun        type: boolean
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun      st,filter0-sync:
152*4882a593Smuzhiyun        description:
153*4882a593Smuzhiyun          Set to 1 to synchronize with DFSDM filter instance 0.
154*4882a593Smuzhiyun          Used for multi microphones synchronization.
155*4882a593Smuzhiyun        type: boolean
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun      dmas:
158*4882a593Smuzhiyun        maxItems: 1
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun      dma-names:
161*4882a593Smuzhiyun        items:
162*4882a593Smuzhiyun          - const: rx
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun    required:
165*4882a593Smuzhiyun      - compatible
166*4882a593Smuzhiyun      - reg
167*4882a593Smuzhiyun      - interrupts
168*4882a593Smuzhiyun      - st,adc-channels
169*4882a593Smuzhiyun      - st,adc-channel-names
170*4882a593Smuzhiyun      - st,filter-order
171*4882a593Smuzhiyun      - "#io-channel-cells"
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun    allOf:
174*4882a593Smuzhiyun      - if:
175*4882a593Smuzhiyun          properties:
176*4882a593Smuzhiyun            compatible:
177*4882a593Smuzhiyun              contains:
178*4882a593Smuzhiyun                const: st,stm32-dfsdm-adc
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun      - then:
181*4882a593Smuzhiyun          properties:
182*4882a593Smuzhiyun            st,adc-channels:
183*4882a593Smuzhiyun              minItems: 1
184*4882a593Smuzhiyun              maxItems: 8
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun            st,adc-channel-names:
187*4882a593Smuzhiyun              minItems: 1
188*4882a593Smuzhiyun              maxItems: 8
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun            st,adc-channel-types:
191*4882a593Smuzhiyun              minItems: 1
192*4882a593Smuzhiyun              maxItems: 8
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun            st,adc-channel-clk-src:
195*4882a593Smuzhiyun              minItems: 1
196*4882a593Smuzhiyun              maxItems: 8
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun            io-channels:
199*4882a593Smuzhiyun              description:
200*4882a593Smuzhiyun                From common IIO binding. Used to pipe external sigma delta
201*4882a593Smuzhiyun                modulator or internal ADC output to DFSDM channel.
202*4882a593Smuzhiyun                This is not required for "st,stm32-dfsdm-pdm" compatibility as
203*4882a593Smuzhiyun                PDM microphone is binded in Audio DT node.
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun          required:
206*4882a593Smuzhiyun            - io-channels
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun      - if:
209*4882a593Smuzhiyun          properties:
210*4882a593Smuzhiyun            compatible:
211*4882a593Smuzhiyun              contains:
212*4882a593Smuzhiyun                const: st,stm32-dfsdm-dmic
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun      - then:
215*4882a593Smuzhiyun          properties:
216*4882a593Smuzhiyun            st,adc-channels:
217*4882a593Smuzhiyun              maxItems: 1
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun            st,adc-channel-names:
220*4882a593Smuzhiyun              maxItems: 1
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun            st,adc-channel-types:
223*4882a593Smuzhiyun              maxItems: 1
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun            st,adc-channel-clk-src:
226*4882a593Smuzhiyun              maxItems: 1
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun          required:
229*4882a593Smuzhiyun            - dmas
230*4882a593Smuzhiyun            - dma-names
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun          patternProperties:
233*4882a593Smuzhiyun            "^dfsdm-dai+$":
234*4882a593Smuzhiyun              type: object
235*4882a593Smuzhiyun              description: child node
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun              properties:
238*4882a593Smuzhiyun                "#sound-dai-cells":
239*4882a593Smuzhiyun                  const: 0
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun                io-channels:
242*4882a593Smuzhiyun                  description:
243*4882a593Smuzhiyun                    From common IIO binding. Used to pipe external sigma delta
244*4882a593Smuzhiyun                    modulator or internal ADC output to DFSDM channel.
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun              required:
247*4882a593Smuzhiyun                - "#sound-dai-cells"
248*4882a593Smuzhiyun                - io-channels
249*4882a593Smuzhiyun
250*4882a593SmuzhiyunallOf:
251*4882a593Smuzhiyun  - if:
252*4882a593Smuzhiyun      properties:
253*4882a593Smuzhiyun        compatible:
254*4882a593Smuzhiyun          contains:
255*4882a593Smuzhiyun            const: st,stm32h7-dfsdm
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun  - then:
258*4882a593Smuzhiyun      patternProperties:
259*4882a593Smuzhiyun        "^filter@[0-9]+$":
260*4882a593Smuzhiyun          properties:
261*4882a593Smuzhiyun            reg:
262*4882a593Smuzhiyun              items:
263*4882a593Smuzhiyun                minimum: 0
264*4882a593Smuzhiyun                maximum: 3
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun  - if:
267*4882a593Smuzhiyun      properties:
268*4882a593Smuzhiyun        compatible:
269*4882a593Smuzhiyun          contains:
270*4882a593Smuzhiyun            const: st,stm32mp1-dfsdm
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun  - then:
273*4882a593Smuzhiyun      patternProperties:
274*4882a593Smuzhiyun        "^filter@[0-9]+$":
275*4882a593Smuzhiyun          properties:
276*4882a593Smuzhiyun            reg:
277*4882a593Smuzhiyun              items:
278*4882a593Smuzhiyun                minimum: 0
279*4882a593Smuzhiyun                maximum: 5
280*4882a593Smuzhiyun
281*4882a593Smuzhiyunexamples:
282*4882a593Smuzhiyun  - |
283*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/arm-gic.h>
284*4882a593Smuzhiyun    #include <dt-bindings/clock/stm32mp1-clks.h>
285*4882a593Smuzhiyun    dfsdm: dfsdm@4400d000 {
286*4882a593Smuzhiyun      compatible = "st,stm32mp1-dfsdm";
287*4882a593Smuzhiyun      reg = <0x4400d000 0x800>;
288*4882a593Smuzhiyun      clocks = <&rcc DFSDM_K>, <&rcc ADFSDM_K>;
289*4882a593Smuzhiyun      clock-names = "dfsdm", "audio";
290*4882a593Smuzhiyun      #address-cells = <1>;
291*4882a593Smuzhiyun      #size-cells = <0>;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun      dfsdm0: filter@0 {
294*4882a593Smuzhiyun        compatible = "st,stm32-dfsdm-dmic";
295*4882a593Smuzhiyun        reg = <0>;
296*4882a593Smuzhiyun        interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
297*4882a593Smuzhiyun        dmas = <&dmamux1 101 0x400 0x01>;
298*4882a593Smuzhiyun        dma-names = "rx";
299*4882a593Smuzhiyun        #io-channel-cells = <1>;
300*4882a593Smuzhiyun        st,adc-channels = <1>;
301*4882a593Smuzhiyun        st,adc-channel-names = "dmic0";
302*4882a593Smuzhiyun        st,adc-channel-types = "SPI_R";
303*4882a593Smuzhiyun        st,adc-channel-clk-src = "CLKOUT";
304*4882a593Smuzhiyun        st,filter-order = <5>;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun        asoc_pdm0: dfsdm-dai {
307*4882a593Smuzhiyun          compatible = "st,stm32h7-dfsdm-dai";
308*4882a593Smuzhiyun          #sound-dai-cells = <0>;
309*4882a593Smuzhiyun          io-channels = <&dfsdm0 0>;
310*4882a593Smuzhiyun        };
311*4882a593Smuzhiyun      };
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun      dfsdm_pdm1: filter@1 {
314*4882a593Smuzhiyun        compatible = "st,stm32-dfsdm-adc";
315*4882a593Smuzhiyun        reg = <1>;
316*4882a593Smuzhiyun        interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
317*4882a593Smuzhiyun        dmas = <&dmamux1 102 0x400 0x01>;
318*4882a593Smuzhiyun        dma-names = "rx";
319*4882a593Smuzhiyun        #io-channel-cells = <1>;
320*4882a593Smuzhiyun        st,adc-channels = <2 3>;
321*4882a593Smuzhiyun        st,adc-channel-names = "in2", "in3";
322*4882a593Smuzhiyun        st,adc-channel-types = "SPI_R", "SPI_R";
323*4882a593Smuzhiyun        st,adc-channel-clk-src = "CLKOUT_F", "CLKOUT_F";
324*4882a593Smuzhiyun        io-channels = <&sd_adc2 &sd_adc3>;
325*4882a593Smuzhiyun        st,filter-order = <1>;
326*4882a593Smuzhiyun      };
327*4882a593Smuzhiyun    };
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun...
330