xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* Renesas R-Car GyroADC device driver
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThe GyroADC block is a reduced SPI block with up to 8 chipselect lines,
4*4882a593Smuzhiyunwhich supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs
5*4882a593Smuzhiyunare sampled by the GyroADC block in a round-robin fashion and the result
6*4882a593Smuzhiyunpresented in the GyroADC registers.
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunRequired properties:
9*4882a593Smuzhiyun- compatible:	Should be "<soc-specific>", "renesas,rcar-gyroadc".
10*4882a593Smuzhiyun                The <soc-specific> should be one of:
11*4882a593Smuzhiyun		renesas,r8a7791-gyroadc - for the GyroADC block present
12*4882a593Smuzhiyun					  in r8a7791 SoC
13*4882a593Smuzhiyun		renesas,r8a7792-gyroadc - for the GyroADC with interrupt
14*4882a593Smuzhiyun					  block present in r8a7792 SoC
15*4882a593Smuzhiyun- reg:		Address and length of the register set for the device
16*4882a593Smuzhiyun- clocks:	References to all the clocks specified in the clock-names
17*4882a593Smuzhiyun		property as specified in
18*4882a593Smuzhiyun		Documentation/devicetree/bindings/clock/clock-bindings.txt.
19*4882a593Smuzhiyun- clock-names:	Shall contain "fck". The "fck" is the GyroADC block clock.
20*4882a593Smuzhiyun- power-domains: Must contain a reference to the PM domain, if available.
21*4882a593Smuzhiyun- #address-cells: Should be <1> (setting for the subnodes) for all ADCs
22*4882a593Smuzhiyun		except for "fujitsu,mb88101a". Should be <0> (setting for
23*4882a593Smuzhiyun		only subnode) for "fujitsu,mb88101a".
24*4882a593Smuzhiyun- #size-cells:	Should be <0> (setting for the subnodes)
25*4882a593Smuzhiyun
26*4882a593SmuzhiyunSub-nodes:
27*4882a593SmuzhiyunYou must define subnode(s) which select the connected ADC type and reference
28*4882a593Smuzhiyunvoltage for the GyroADC channels.
29*4882a593Smuzhiyun
30*4882a593SmuzhiyunRequired properties for subnodes:
31*4882a593Smuzhiyun- compatible:	Should be either of:
32*4882a593Smuzhiyun		"fujitsu,mb88101a"
33*4882a593Smuzhiyun			- Fujitsu MB88101A compatible mode,
34*4882a593Smuzhiyun			  12bit sampling, up to 4 channels can be sampled in
35*4882a593Smuzhiyun			  round-robin fashion. One Fujitsu chip supplies four
36*4882a593Smuzhiyun			  GyroADC channels with data as it contains four ADCs
37*4882a593Smuzhiyun			  on the chip and thus for 4-channel operation, single
38*4882a593Smuzhiyun			  MB88101A is required. The Cx chipselect lines of the
39*4882a593Smuzhiyun			  MB88101A connect directly to two CHS lines of the
40*4882a593Smuzhiyun			  GyroADC, no demuxer is required. The data out line
41*4882a593Smuzhiyun			  of each MB88101A connects to a shared input pin of
42*4882a593Smuzhiyun			  the GyroADC.
43*4882a593Smuzhiyun		"ti,adcs7476" or "ti,adc121" or "adi,ad7476"
44*4882a593Smuzhiyun			- TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode,
45*4882a593Smuzhiyun			  15bit sampling, up to 8 channels can be sampled in
46*4882a593Smuzhiyun			  round-robin fashion. One TI/ADI chip supplies single
47*4882a593Smuzhiyun			  ADC channel with data, thus for 8-channel operation,
48*4882a593Smuzhiyun			  8 chips are required. A 3:8 chipselect demuxer is
49*4882a593Smuzhiyun			  required to connect the nCS line of the TI/ADI chips
50*4882a593Smuzhiyun			  to the GyroADC, while MISO line of each TI/ADI ADC
51*4882a593Smuzhiyun			  connects to a shared input pin of the GyroADC.
52*4882a593Smuzhiyun		"maxim,max1162" or "maxim,max11100"
53*4882a593Smuzhiyun			- Maxim MAX1162 / Maxim MAX11100 compatible mode,
54*4882a593Smuzhiyun			  16bit sampling, up to 8 channels can be sampled in
55*4882a593Smuzhiyun			  round-robin fashion. One Maxim chip supplies single
56*4882a593Smuzhiyun			  ADC channel with data, thus for 8-channel operation,
57*4882a593Smuzhiyun			  8 chips are required. A 3:8 chipselect demuxer is
58*4882a593Smuzhiyun			  required to connect the nCS line of the MAX chips
59*4882a593Smuzhiyun			  to the GyroADC, while MISO line of each Maxim ADC
60*4882a593Smuzhiyun			  connects to a shared input pin of the GyroADC.
61*4882a593Smuzhiyun- reg:		Should be the number of the analog input. Should be present
62*4882a593Smuzhiyun		for all ADCs except "fujitsu,mb88101a".
63*4882a593Smuzhiyun- vref-supply:	Reference to the channel reference voltage regulator.
64*4882a593Smuzhiyun
65*4882a593SmuzhiyunExample:
66*4882a593Smuzhiyun	vref_max1162: regulator-vref-max1162 {
67*4882a593Smuzhiyun		compatible = "regulator-fixed";
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun		regulator-name = "MAX1162 Vref";
70*4882a593Smuzhiyun		regulator-min-microvolt = <4096000>;
71*4882a593Smuzhiyun		regulator-max-microvolt = <4096000>;
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun	adc@e6e54000 {
75*4882a593Smuzhiyun		compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
76*4882a593Smuzhiyun		reg = <0 0xe6e54000 0 64>;
77*4882a593Smuzhiyun		clocks = <&mstp9_clks R8A7791_CLK_GYROADC>;
78*4882a593Smuzhiyun		clock-names = "fck";
79*4882a593Smuzhiyun		power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun		pinctrl-0 = <&adc_pins>;
82*4882a593Smuzhiyun		pinctrl-names = "default";
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		#address-cells = <1>;
85*4882a593Smuzhiyun		#size-cells = <0>;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun		adc@0 {
88*4882a593Smuzhiyun			reg = <0>;
89*4882a593Smuzhiyun			compatible = "maxim,max1162";
90*4882a593Smuzhiyun			vref-supply = <&vref_max1162>;
91*4882a593Smuzhiyun		};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun		adc@1 {
94*4882a593Smuzhiyun			reg = <1>;
95*4882a593Smuzhiyun			compatible = "maxim,max1162";
96*4882a593Smuzhiyun			vref-supply = <&vref_max1162>;
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun	};
99