xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: ADC found on Freescale vf610 and similar SoCs
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Fugang Duan <fugang.duan@nxp.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyundescription:
13*4882a593Smuzhiyun  ADCs found on vf610/i.MX6slx and upward SoCs from Freescale.
14*4882a593Smuzhiyun
15*4882a593Smuzhiyunproperties:
16*4882a593Smuzhiyun  compatible:
17*4882a593Smuzhiyun    const: fsl,vf610-adc
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun  reg:
20*4882a593Smuzhiyun    maxItems: 1
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  interrupts:
23*4882a593Smuzhiyun    maxItems: 1
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun  clocks:
26*4882a593Smuzhiyun    description: ADC source clock (ipg clock)
27*4882a593Smuzhiyun    maxItems: 1
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun  clock-names:
30*4882a593Smuzhiyun    const: adc
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  vref-supply:
33*4882a593Smuzhiyun    description: ADC reference voltage supply.
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun  fsl,adck-max-frequency:
36*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32-array
37*4882a593Smuzhiyun    minItems: 3
38*4882a593Smuzhiyun    maxItems: 3
39*4882a593Smuzhiyun    description: |
40*4882a593Smuzhiyun      Maximum frequencies from datasheet operating requirements.
41*4882a593Smuzhiyun      Three values necessary to cover the 3 conversion modes.
42*4882a593Smuzhiyun      * Frequency in normal mode (ADLPC=0, ADHSC=0)
43*4882a593Smuzhiyun      * Frequency in high-speed mode (ADLPC=0, ADHSC=1)
44*4882a593Smuzhiyun      * Frequency in low-power mode (ADLPC=1, ADHSC=0)
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  min-sample-time:
47*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
48*4882a593Smuzhiyun    description:
49*4882a593Smuzhiyun      Minimum sampling time in nanoseconds. This value has
50*4882a593Smuzhiyun      to be chosen according to the conversion mode and the connected analog
51*4882a593Smuzhiyun      source resistance (R_as) and capacitance (C_as). Refer the datasheet's
52*4882a593Smuzhiyun      operating requirements. A safe default across a wide range of R_as and
53*4882a593Smuzhiyun      C_as as well as conversion modes is 1000ns.
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun  "#io-channel-cells":
56*4882a593Smuzhiyun    const: 1
57*4882a593Smuzhiyun
58*4882a593Smuzhiyunrequired:
59*4882a593Smuzhiyun  - compatible
60*4882a593Smuzhiyun  - reg
61*4882a593Smuzhiyun  - interrupts
62*4882a593Smuzhiyun  - clocks
63*4882a593Smuzhiyun  - clock-names
64*4882a593Smuzhiyun  - vref-supply
65*4882a593Smuzhiyun
66*4882a593SmuzhiyunadditionalProperties: false
67*4882a593Smuzhiyun
68*4882a593Smuzhiyunexamples:
69*4882a593Smuzhiyun  - |
70*4882a593Smuzhiyun    #include <dt-bindings/clock/vf610-clock.h>
71*4882a593Smuzhiyun    adc@4003b000 {
72*4882a593Smuzhiyun        compatible = "fsl,vf610-adc";
73*4882a593Smuzhiyun        reg = <0x4003b000 0x1000>;
74*4882a593Smuzhiyun        interrupts = <0 53 0x04>;
75*4882a593Smuzhiyun        clocks = <&clks VF610_CLK_ADC0>;
76*4882a593Smuzhiyun        clock-names = "adc";
77*4882a593Smuzhiyun        fsl,adck-max-frequency = <30000000>, <40000000>, <20000000>;
78*4882a593Smuzhiyun        vref-supply = <&reg_vcc_3v3_mcu>;
79*4882a593Smuzhiyun        min-sample-time = <10000>;
80*4882a593Smuzhiyun    };
81*4882a593Smuzhiyun...
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