1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2400-adc.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: ADC that forms part of an ASPEED server management processor. 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Joel Stanley <joel@jms.id.au> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: 13*4882a593Smuzhiyun This device is a 10-bit converter for 16 voltage channels. All inputs are 14*4882a593Smuzhiyun single ended. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun enum: 19*4882a593Smuzhiyun - aspeed,ast2400-adc 20*4882a593Smuzhiyun - aspeed,ast2500-adc 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun reg: 23*4882a593Smuzhiyun maxItems: 1 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun clocks: 26*4882a593Smuzhiyun description: 27*4882a593Smuzhiyun Input clock used to derive the sample clock. Expected to be the 28*4882a593Smuzhiyun SoC's APB clock. 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun resets: 31*4882a593Smuzhiyun maxItems: 1 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun "#io-channel-cells": 34*4882a593Smuzhiyun const: 1 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunrequired: 37*4882a593Smuzhiyun - compatible 38*4882a593Smuzhiyun - reg 39*4882a593Smuzhiyun - clocks 40*4882a593Smuzhiyun - resets 41*4882a593Smuzhiyun - "#io-channel-cells" 42*4882a593Smuzhiyun 43*4882a593SmuzhiyunadditionalProperties: false 44*4882a593Smuzhiyun 45*4882a593Smuzhiyunexamples: 46*4882a593Smuzhiyun - | 47*4882a593Smuzhiyun #include <dt-bindings/clock/aspeed-clock.h> 48*4882a593Smuzhiyun adc@1e6e9000 { 49*4882a593Smuzhiyun compatible = "aspeed,ast2400-adc"; 50*4882a593Smuzhiyun reg = <0x1e6e9000 0xb0>; 51*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_APB>; 52*4882a593Smuzhiyun resets = <&syscon ASPEED_RESET_ADC>; 53*4882a593Smuzhiyun #io-channel-cells = <1>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun... 56