1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Amlogic Meson SAR (Successive Approximation Register) A/D converter 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: 13*4882a593Smuzhiyun Binding covers a range of ADCs found on Amlogic Meson SoCs. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun oneOf: 18*4882a593Smuzhiyun - const: amlogic,meson-saradc 19*4882a593Smuzhiyun - items: 20*4882a593Smuzhiyun - enum: 21*4882a593Smuzhiyun - amlogic,meson8-saradc 22*4882a593Smuzhiyun - amlogic,meson8b-saradc 23*4882a593Smuzhiyun - amlogic,meson8m2-saradc 24*4882a593Smuzhiyun - amlogic,meson-gxbb-saradc 25*4882a593Smuzhiyun - amlogic,meson-gxl-saradc 26*4882a593Smuzhiyun - amlogic,meson-gxm-saradc 27*4882a593Smuzhiyun - amlogic,meson-axg-saradc 28*4882a593Smuzhiyun - amlogic,meson-g12a-saradc 29*4882a593Smuzhiyun - const: amlogic,meson-saradc 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun reg: 32*4882a593Smuzhiyun maxItems: 1 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun interrupts: 35*4882a593Smuzhiyun description: Interrupt indicates end of sampling. 36*4882a593Smuzhiyun maxItems: 1 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun clocks: 39*4882a593Smuzhiyun minItems: 2 40*4882a593Smuzhiyun maxItems: 4 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun clock-names: 43*4882a593Smuzhiyun minItems: 2 44*4882a593Smuzhiyun maxItems: 4 45*4882a593Smuzhiyun items: 46*4882a593Smuzhiyun - const: clkin 47*4882a593Smuzhiyun - const: core 48*4882a593Smuzhiyun - const: adc_clk 49*4882a593Smuzhiyun - const: adc_sel 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun vref-supply: true 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun "#io-channel-cells": 54*4882a593Smuzhiyun const: 1 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun amlogic,hhi-sysctrl: 57*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/phandle 58*4882a593Smuzhiyun description: 59*4882a593Smuzhiyun Syscon which contains the 5th bit of the TSC (temperature sensor 60*4882a593Smuzhiyun coefficient) on Meson8b and Meson8m2 (which used to calibrate the 61*4882a593Smuzhiyun temperature sensor) 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun nvmem-cells: 64*4882a593Smuzhiyun description: phandle to the temperature_calib eFuse cells 65*4882a593Smuzhiyun maxItems: 1 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun nvmem-cell-names: 68*4882a593Smuzhiyun const: temperature_calib 69*4882a593Smuzhiyun 70*4882a593SmuzhiyunallOf: 71*4882a593Smuzhiyun - if: 72*4882a593Smuzhiyun properties: 73*4882a593Smuzhiyun compatible: 74*4882a593Smuzhiyun contains: 75*4882a593Smuzhiyun enum: 76*4882a593Smuzhiyun - amlogic,meson8-saradc 77*4882a593Smuzhiyun - amlogic,meson8b-saradc 78*4882a593Smuzhiyun - amlogic,meson8m2-saradc 79*4882a593Smuzhiyun then: 80*4882a593Smuzhiyun properties: 81*4882a593Smuzhiyun clocks: 82*4882a593Smuzhiyun maxItems: 2 83*4882a593Smuzhiyun clock-names: 84*4882a593Smuzhiyun maxItems: 2 85*4882a593Smuzhiyun else: 86*4882a593Smuzhiyun properties: 87*4882a593Smuzhiyun nvmem-cells: false 88*4882a593Smuzhiyun mvmem-cel-names: false 89*4882a593Smuzhiyun clocks: 90*4882a593Smuzhiyun minItems: 4 91*4882a593Smuzhiyun clock-names: 92*4882a593Smuzhiyun minItems: 4 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun - if: 95*4882a593Smuzhiyun properties: 96*4882a593Smuzhiyun compatible: 97*4882a593Smuzhiyun contains: 98*4882a593Smuzhiyun enum: 99*4882a593Smuzhiyun - amlogic,meson8b-saradc 100*4882a593Smuzhiyun - amlogic,meson8m2-saradc 101*4882a593Smuzhiyun then: 102*4882a593Smuzhiyun properties: 103*4882a593Smuzhiyun amlogic,hhi-sysctrl: true 104*4882a593Smuzhiyun else: 105*4882a593Smuzhiyun properties: 106*4882a593Smuzhiyun amlogic,hhi-sysctrl: false 107*4882a593Smuzhiyun 108*4882a593Smuzhiyunrequired: 109*4882a593Smuzhiyun - compatible 110*4882a593Smuzhiyun - reg 111*4882a593Smuzhiyun - interrupts 112*4882a593Smuzhiyun - clocks 113*4882a593Smuzhiyun - clock-names 114*4882a593Smuzhiyun - "#io-channel-cells" 115*4882a593Smuzhiyun 116*4882a593SmuzhiyunadditionalProperties: false 117*4882a593Smuzhiyun 118*4882a593Smuzhiyunexamples: 119*4882a593Smuzhiyun - | 120*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/irq.h> 121*4882a593Smuzhiyun #include <dt-bindings/clock/gxbb-clkc.h> 122*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 123*4882a593Smuzhiyun soc { 124*4882a593Smuzhiyun #address-cells = <2>; 125*4882a593Smuzhiyun #size-cells = <2>; 126*4882a593Smuzhiyun adc@8680 { 127*4882a593Smuzhiyun compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; 128*4882a593Smuzhiyun #io-channel-cells = <1>; 129*4882a593Smuzhiyun reg = <0x0 0x8680 0x0 0x34>; 130*4882a593Smuzhiyun interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 131*4882a593Smuzhiyun clocks = <&xtal>, 132*4882a593Smuzhiyun <&clkc CLKID_SAR_ADC>, 133*4882a593Smuzhiyun <&clkc CLKID_SAR_ADC_CLK>, 134*4882a593Smuzhiyun <&clkc CLKID_SAR_ADC_SEL>; 135*4882a593Smuzhiyun clock-names = "clkin", "core", "adc_clk", "adc_sel"; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun adc@9680 { 138*4882a593Smuzhiyun compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; 139*4882a593Smuzhiyun #io-channel-cells = <1>; 140*4882a593Smuzhiyun reg = <0x0 0x9680 0x0 0x34>; 141*4882a593Smuzhiyun interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 142*4882a593Smuzhiyun clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; 143*4882a593Smuzhiyun clock-names = "clkin", "core"; 144*4882a593Smuzhiyun nvmem-cells = <&tsens_caldata>; 145*4882a593Smuzhiyun nvmem-cell-names = "temperature_calib"; 146*4882a593Smuzhiyun amlogic,hhi-sysctrl = <&hhi>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun... 150