1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun# Copyright 2019 Analog Devices Inc. 3*4882a593Smuzhiyun%YAML 1.2 4*4882a593Smuzhiyun--- 5*4882a593Smuzhiyun$id: http://devicetree.org/schemas/iio/adc/adi,ad7192.yaml# 6*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 7*4882a593Smuzhiyun 8*4882a593Smuzhiyuntitle: Analog Devices AD7192 ADC device driver 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunmaintainers: 11*4882a593Smuzhiyun - Michael Hennerich <michael.hennerich@analog.com> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundescription: | 14*4882a593Smuzhiyun Bindings for the Analog Devices AD7192 ADC device. Datasheet can be 15*4882a593Smuzhiyun found here: 16*4882a593Smuzhiyun https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunproperties: 19*4882a593Smuzhiyun compatible: 20*4882a593Smuzhiyun enum: 21*4882a593Smuzhiyun - adi,ad7190 22*4882a593Smuzhiyun - adi,ad7192 23*4882a593Smuzhiyun - adi,ad7193 24*4882a593Smuzhiyun - adi,ad7195 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun reg: 27*4882a593Smuzhiyun maxItems: 1 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun spi-cpol: true 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun spi-cpha: true 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun spi-max-frequency: true 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun clocks: 36*4882a593Smuzhiyun maxItems: 1 37*4882a593Smuzhiyun description: phandle to the master clock (mclk) 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun clock-names: 40*4882a593Smuzhiyun items: 41*4882a593Smuzhiyun - const: mclk 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun interrupts: 44*4882a593Smuzhiyun maxItems: 1 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun dvdd-supply: 47*4882a593Smuzhiyun description: DVdd voltage supply 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun avdd-supply: 50*4882a593Smuzhiyun description: AVdd voltage supply 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun adi,rejection-60-Hz-enable: 53*4882a593Smuzhiyun description: | 54*4882a593Smuzhiyun This bit enables a notch at 60 Hz when the first notch of the sinc 55*4882a593Smuzhiyun filter is at 50 Hz. When REJ60 is set, a filter notch is placed at 56*4882a593Smuzhiyun 60 Hz when the sinc filter first notch is at 50 Hz. This allows 57*4882a593Smuzhiyun simultaneous 50 Hz/ 60 Hz rejection. 58*4882a593Smuzhiyun type: boolean 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun adi,refin2-pins-enable: 61*4882a593Smuzhiyun description: | 62*4882a593Smuzhiyun External reference applied between the P1/REFIN2(+) and P0/REFIN2(−) pins. 63*4882a593Smuzhiyun type: boolean 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun adi,buffer-enable: 66*4882a593Smuzhiyun description: | 67*4882a593Smuzhiyun Enables the buffer on the analog inputs. If cleared, the analog inputs 68*4882a593Smuzhiyun are unbuffered, lowering the power consumption of the device. If this 69*4882a593Smuzhiyun bit is set, the analog inputs are buffered, allowing the user to place 70*4882a593Smuzhiyun source impedances on the front end without contributing gain errors to 71*4882a593Smuzhiyun the system. 72*4882a593Smuzhiyun type: boolean 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun adi,burnout-currents-enable: 75*4882a593Smuzhiyun description: | 76*4882a593Smuzhiyun When this bit is set to 1, the 500 nA current sources in the signal 77*4882a593Smuzhiyun path are enabled. When BURN = 0, the burnout currents are disabled. 78*4882a593Smuzhiyun The burnout currents can be enabled only when the buffer is active 79*4882a593Smuzhiyun and when chop is disabled. 80*4882a593Smuzhiyun type: boolean 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun bipolar: 83*4882a593Smuzhiyun description: see Documentation/devicetree/bindings/iio/adc/adc.txt 84*4882a593Smuzhiyun type: boolean 85*4882a593Smuzhiyun 86*4882a593Smuzhiyunrequired: 87*4882a593Smuzhiyun - compatible 88*4882a593Smuzhiyun - reg 89*4882a593Smuzhiyun - clocks 90*4882a593Smuzhiyun - clock-names 91*4882a593Smuzhiyun - interrupts 92*4882a593Smuzhiyun - dvdd-supply 93*4882a593Smuzhiyun - avdd-supply 94*4882a593Smuzhiyun - spi-cpol 95*4882a593Smuzhiyun - spi-cpha 96*4882a593Smuzhiyun 97*4882a593SmuzhiyunadditionalProperties: false 98*4882a593Smuzhiyun 99*4882a593Smuzhiyunexamples: 100*4882a593Smuzhiyun - | 101*4882a593Smuzhiyun spi0 { 102*4882a593Smuzhiyun #address-cells = <1>; 103*4882a593Smuzhiyun #size-cells = <0>; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun adc@0 { 106*4882a593Smuzhiyun compatible = "adi,ad7192"; 107*4882a593Smuzhiyun reg = <0>; 108*4882a593Smuzhiyun spi-max-frequency = <1000000>; 109*4882a593Smuzhiyun spi-cpol; 110*4882a593Smuzhiyun spi-cpha; 111*4882a593Smuzhiyun clocks = <&ad7192_mclk>; 112*4882a593Smuzhiyun clock-names = "mclk"; 113*4882a593Smuzhiyun interrupts = <25 0x2>; 114*4882a593Smuzhiyun interrupt-parent = <&gpio>; 115*4882a593Smuzhiyun dvdd-supply = <&dvdd>; 116*4882a593Smuzhiyun avdd-supply = <&avdd>; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun adi,refin2-pins-enable; 119*4882a593Smuzhiyun adi,rejection-60-Hz-enable; 120*4882a593Smuzhiyun adi,buffer-enable; 121*4882a593Smuzhiyun adi,burnout-currents-enable; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun }; 124