xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Analog Devices AXI ADC IP core
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Michael Hennerich <michael.hennerich@analog.com>
11*4882a593Smuzhiyun  - Alexandru Ardelean <alexandru.ardelean@analog.com>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundescription: |
14*4882a593Smuzhiyun  Analog Devices Generic AXI ADC IP core for interfacing an ADC device
15*4882a593Smuzhiyun  with a high speed serial (JESD204B/C) or source synchronous parallel
16*4882a593Smuzhiyun  interface (LVDS/CMOS).
17*4882a593Smuzhiyun  Usually, some other interface type (i.e SPI) is used as a control
18*4882a593Smuzhiyun  interface for the actual ADC, while this IP core will interface
19*4882a593Smuzhiyun  to the data-lines of the ADC and handle the streaming of data into
20*4882a593Smuzhiyun  memory via DMA.
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
23*4882a593Smuzhiyun
24*4882a593Smuzhiyunproperties:
25*4882a593Smuzhiyun  compatible:
26*4882a593Smuzhiyun    enum:
27*4882a593Smuzhiyun      - adi,axi-adc-10.0.a
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun  reg:
30*4882a593Smuzhiyun    maxItems: 1
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  dmas:
33*4882a593Smuzhiyun    maxItems: 1
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun  dma-names:
36*4882a593Smuzhiyun    items:
37*4882a593Smuzhiyun      - const: rx
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun  adi,adc-dev:
40*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/phandle
41*4882a593Smuzhiyun    description:
42*4882a593Smuzhiyun      A reference to a the actual ADC to which this FPGA ADC interfaces to.
43*4882a593Smuzhiyun
44*4882a593Smuzhiyunrequired:
45*4882a593Smuzhiyun  - compatible
46*4882a593Smuzhiyun  - dmas
47*4882a593Smuzhiyun  - reg
48*4882a593Smuzhiyun  - adi,adc-dev
49*4882a593Smuzhiyun
50*4882a593SmuzhiyunadditionalProperties: false
51*4882a593Smuzhiyun
52*4882a593Smuzhiyunexamples:
53*4882a593Smuzhiyun  - |
54*4882a593Smuzhiyun    axi-adc@44a00000 {
55*4882a593Smuzhiyun          compatible = "adi,axi-adc-10.0.a";
56*4882a593Smuzhiyun          reg = <0x44a00000 0x10000>;
57*4882a593Smuzhiyun          dmas = <&rx_dma 0>;
58*4882a593Smuzhiyun          dma-names = "rx";
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun          adi,adc-dev = <&spi_adc>;
61*4882a593Smuzhiyun    };
62*4882a593Smuzhiyun...
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