1*4882a593SmuzhiyunGeneric device tree bindings for I3C busses 2*4882a593Smuzhiyun=========================================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThis document describes generic bindings that should be used to describe I3C 5*4882a593Smuzhiyunbusses in a device tree. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties 8*4882a593Smuzhiyun------------------- 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun- #address-cells - should be <3>. Read more about addresses below. 11*4882a593Smuzhiyun- #size-cells - should be <0>. 12*4882a593Smuzhiyun- compatible - name of the I3C master controller driving the I3C bus 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunFor other required properties e.g. to describe register sets, 15*4882a593Smuzhiyunclocks, etc. check the binding documentation of the specific driver. 16*4882a593SmuzhiyunThe node describing an I3C bus should be named i3c-master. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunOptional properties 19*4882a593Smuzhiyun------------------- 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunThese properties may not be supported by all I3C master drivers. Each I3C 22*4882a593Smuzhiyunmaster bindings should specify which of them are supported. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun- i3c-scl-hz: frequency of the SCL signal used for I3C transfers. 25*4882a593Smuzhiyun When undefined the core sets it to 12.5MHz. 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun- i2c-scl-hz: frequency of the SCL signal used for I2C transfers. 28*4882a593Smuzhiyun When undefined, the core looks at LVR (Legacy Virtual Register) 29*4882a593Smuzhiyun values of I2C devices described in the device tree to determine 30*4882a593Smuzhiyun the maximum I2C frequency. 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunI2C devices 33*4882a593Smuzhiyun=========== 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunEach I2C device connected to the bus should be described in a subnode. All 36*4882a593Smuzhiyunproperties described in Documentation/devicetree/bindings/i2c/i2c.txt are 37*4882a593Smuzhiyunvalid here, but several new properties have been added. 38*4882a593Smuzhiyun 39*4882a593SmuzhiyunNew constraint on existing properties: 40*4882a593Smuzhiyun-------------------------------------- 41*4882a593Smuzhiyun- reg: contains 3 cells 42*4882a593Smuzhiyun + first cell : still encoding the I2C address. 10 bit addressing is not 43*4882a593Smuzhiyun supported. Devices with 10 bit address can't be properly passed through 44*4882a593Smuzhiyun DEFSLVS command. 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun + second cell: shall be 0 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun + third cell: shall encode the I3C LVR (Legacy Virtual Register) 49*4882a593Smuzhiyun bit[31:8]: unused/ignored 50*4882a593Smuzhiyun bit[7:5]: I2C device index. Possible values 51*4882a593Smuzhiyun * 0: I2C device has a 50 ns spike filter 52*4882a593Smuzhiyun * 1: I2C device does not have a 50 ns spike filter but supports high 53*4882a593Smuzhiyun frequency on SCL 54*4882a593Smuzhiyun * 2: I2C device does not have a 50 ns spike filter and is not tolerant 55*4882a593Smuzhiyun to high frequencies 56*4882a593Smuzhiyun * 3-7: reserved 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun bit[4]: tell whether the device operates in FM (Fast Mode) or FM+ mode 59*4882a593Smuzhiyun * 0: FM+ mode 60*4882a593Smuzhiyun * 1: FM mode 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun bit[3:0]: device type 63*4882a593Smuzhiyun * 0-15: reserved 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunThe I2C node unit-address should always match the first cell of the reg 66*4882a593Smuzhiyunproperty: <device-type>@<i2c-address>. 67*4882a593Smuzhiyun 68*4882a593SmuzhiyunI3C devices 69*4882a593Smuzhiyun=========== 70*4882a593Smuzhiyun 71*4882a593SmuzhiyunAll I3C devices are supposed to support DAA (Dynamic Address Assignment), and 72*4882a593Smuzhiyunare thus discoverable. So, by default, I3C devices do not have to be described 73*4882a593Smuzhiyunin the device tree. 74*4882a593SmuzhiyunThis being said, one might want to attach extra resources to these devices, 75*4882a593Smuzhiyunand those resources may have to be described in the device tree, which in turn 76*4882a593Smuzhiyunmeans we have to describe I3C devices. 77*4882a593Smuzhiyun 78*4882a593SmuzhiyunAnother use case for describing an I3C device in the device tree is when this 79*4882a593SmuzhiyunI3C device has a static I2C address and we want to assign it a specific I3C 80*4882a593Smuzhiyundynamic address before the DAA takes place (so that other devices on the bus 81*4882a593Smuzhiyuncan't take this dynamic address). 82*4882a593Smuzhiyun 83*4882a593SmuzhiyunThe I3C device should be names <device-type>@<static-i2c-address>,<i3c-pid>, 84*4882a593Smuzhiyunwhere device-type is describing the type of device connected on the bus 85*4882a593Smuzhiyun(gpio-controller, sensor, ...). 86*4882a593Smuzhiyun 87*4882a593SmuzhiyunRequired properties 88*4882a593Smuzhiyun------------------- 89*4882a593Smuzhiyun- reg: contains 3 cells 90*4882a593Smuzhiyun + first cell : encodes the static I2C address. Should be 0 if the device does 91*4882a593Smuzhiyun not have one (0 is not a valid I2C address). 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun + second and third cells: should encode the ProvisionalID. The second cell 94*4882a593Smuzhiyun contains the manufacturer ID left-shifted by 1. 95*4882a593Smuzhiyun The third cell contains ORing of the part ID 96*4882a593Smuzhiyun left-shifted by 16, the instance ID left-shifted 97*4882a593Smuzhiyun by 12 and the extra information. This encoding is 98*4882a593Smuzhiyun following the PID definition provided by the I3C 99*4882a593Smuzhiyun specification. 100*4882a593Smuzhiyun 101*4882a593SmuzhiyunOptional properties 102*4882a593Smuzhiyun------------------- 103*4882a593Smuzhiyun- assigned-address: dynamic address to be assigned to this device. This 104*4882a593Smuzhiyun property is only valid if the I3C device has a static 105*4882a593Smuzhiyun address (first cell of the reg property != 0). 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun 108*4882a593SmuzhiyunExample: 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun i3c-master@d040000 { 111*4882a593Smuzhiyun compatible = "cdns,i3c-master"; 112*4882a593Smuzhiyun clocks = <&coreclock>, <&i3csysclock>; 113*4882a593Smuzhiyun clock-names = "pclk", "sysclk"; 114*4882a593Smuzhiyun interrupts = <3 0>; 115*4882a593Smuzhiyun reg = <0x0d040000 0x1000>; 116*4882a593Smuzhiyun #address-cells = <3>; 117*4882a593Smuzhiyun #size-cells = <0>; 118*4882a593Smuzhiyun i2c-scl-hz = <100000>; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun /* I2C device. */ 121*4882a593Smuzhiyun nunchuk: nunchuk@52 { 122*4882a593Smuzhiyun compatible = "nintendo,nunchuk"; 123*4882a593Smuzhiyun reg = <0x52 0x0 0x10>; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun /* I3C device with a static I2C address. */ 127*4882a593Smuzhiyun thermal_sensor: sensor@68,39200144004 { 128*4882a593Smuzhiyun reg = <0x68 0x392 0x144004>; 129*4882a593Smuzhiyun assigned-address = <0xa>; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun /* 133*4882a593Smuzhiyun * I3C device without a static I2C address but requiring 134*4882a593Smuzhiyun * resources described in the DT. 135*4882a593Smuzhiyun */ 136*4882a593Smuzhiyun sensor@0,39200154004 { 137*4882a593Smuzhiyun reg = <0x0 0x392 0x154004>; 138*4882a593Smuzhiyun clocks = <&clock_provider 0>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun }; 141