1*4882a593SmuzhiyunDevice tree configuration for Renesas EMEV2 IIC controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible : "renesas,iic-emev2" 5*4882a593Smuzhiyun- reg : address start and address range size of device 6*4882a593Smuzhiyun- interrupts : specifier for the IIC controller interrupt 7*4882a593Smuzhiyun- clocks : phandle to the IP core SCLK 8*4882a593Smuzhiyun- clock-names : must be "sclk" 9*4882a593Smuzhiyun- #address-cells : should be <1> 10*4882a593Smuzhiyun- #size-cells : should be <0> 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunExample: 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun iic0: i2c@e0070000 { 15*4882a593Smuzhiyun #address-cells = <1>; 16*4882a593Smuzhiyun #size-cells = <0>; 17*4882a593Smuzhiyun compatible = "renesas,iic-emev2"; 18*4882a593Smuzhiyun reg = <0xe0070000 0x28>; 19*4882a593Smuzhiyun interrupts = <0 32 IRQ_TYPE_EDGE_RISING>; 20*4882a593Smuzhiyun clocks = <&iic0_sclk>; 21*4882a593Smuzhiyun clock-names = "sclk"; 22*4882a593Smuzhiyun }; 23