1*4882a593SmuzhiyunI2C for SiRFprimaII platforms 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties : 4*4882a593Smuzhiyun- compatible : Must be "sirf,prima2-i2c" 5*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 6*4882a593Smuzhiyun region. 7*4882a593Smuzhiyun- interrupts: interrupt number to the cpu. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunOptional properties: 10*4882a593Smuzhiyun- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz. 11*4882a593Smuzhiyun The absence of the property indicates the default frequency 100 kHz. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExamples : 14*4882a593Smuzhiyun 15*4882a593Smuzhiyuni2c0: i2c@b00e0000 { 16*4882a593Smuzhiyun compatible = "sirf,prima2-i2c"; 17*4882a593Smuzhiyun reg = <0xb00e0000 0x10000>; 18*4882a593Smuzhiyun interrupts = <24>; 19*4882a593Smuzhiyun}; 20