1*4882a593Smuzhiyun* Samsung's I2C controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Samsung's I2C controller is used to interface with I2C devices. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun - compatible: value should be either of the following. 7*4882a593Smuzhiyun (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c. 8*4882a593Smuzhiyun (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c. 9*4882a593Smuzhiyun (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used 10*4882a593Smuzhiyun inside HDMIPHY block found on several samsung SoCs 11*4882a593Smuzhiyun (d) "samsung, exynos5-sata-phy-i2c", for s3c2440-like i2c used as 12*4882a593Smuzhiyun a host to SATA PHY controller on an internal bus. 13*4882a593Smuzhiyun - reg: physical base address of the controller and length of memory mapped 14*4882a593Smuzhiyun region. 15*4882a593Smuzhiyun - interrupts: interrupt number to the cpu. 16*4882a593Smuzhiyun - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunRequired for all cases except "samsung,s3c2440-hdmiphy-i2c": 19*4882a593Smuzhiyun - Samsung GPIO variant (deprecated): 20*4882a593Smuzhiyun - gpios: The order of the gpios should be the following: <SDA, SCL>. 21*4882a593Smuzhiyun The gpio specifier depends on the gpio controller. Required in all 22*4882a593Smuzhiyun cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output 23*4882a593Smuzhiyun lines are permanently wired to the respective clienta 24*4882a593Smuzhiyun - Pinctrl variant (preferred, if available): 25*4882a593Smuzhiyun - pinctrl-0: Pin control group to be used for this controller. 26*4882a593Smuzhiyun - pinctrl-names: Should contain only one value - "default". 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunOptional properties: 29*4882a593Smuzhiyun - samsung,i2c-slave-addr: Slave address in multi-master environment. If not 30*4882a593Smuzhiyun specified, default value is 0. 31*4882a593Smuzhiyun - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not 32*4882a593Smuzhiyun specified, the default value in Hz is 100000. 33*4882a593Smuzhiyun - samsung,sysreg-phandle - handle to syscon used to control the system registers 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunExample: 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun i2c@13870000 { 38*4882a593Smuzhiyun compatible = "samsung,s3c2440-i2c"; 39*4882a593Smuzhiyun reg = <0x13870000 0x100>; 40*4882a593Smuzhiyun interrupts = <345>; 41*4882a593Smuzhiyun samsung,i2c-sda-delay = <100>; 42*4882a593Smuzhiyun samsung,i2c-max-bus-freq = <100000>; 43*4882a593Smuzhiyun /* Samsung GPIO variant begins here */ 44*4882a593Smuzhiyun gpios = <&gpd1 2 0 /* SDA */ 45*4882a593Smuzhiyun &gpd1 3 0 /* SCL */>; 46*4882a593Smuzhiyun /* Samsung GPIO variant ends here */ 47*4882a593Smuzhiyun /* Pinctrl variant begins here */ 48*4882a593Smuzhiyun pinctrl-0 = <&i2c3_bus>; 49*4882a593Smuzhiyun pinctrl-names = "default"; 50*4882a593Smuzhiyun /* Pinctrl variant ends here */ 51*4882a593Smuzhiyun #address-cells = <1>; 52*4882a593Smuzhiyun #size-cells = <0>; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun wm8994@1a { 55*4882a593Smuzhiyun compatible = "wlf,wm8994"; 56*4882a593Smuzhiyun reg = <0x1a>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59