1*4882a593SmuzhiyunCommon i2c bus multiplexer/switch properties. 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunAn i2c bus multiplexer/switch will have several child busses that are 4*4882a593Smuzhiyunnumbered uniquely in a device dependent manner. The nodes for an i2c bus 5*4882a593Smuzhiyunmultiplexer/switch will have one child node for each child bus. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunOptional properties: 8*4882a593Smuzhiyun- #address-cells = <1>; 9*4882a593Smuzhiyun This property is required if the i2c-mux child node does not exist. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun- #size-cells = <0>; 12*4882a593Smuzhiyun This property is required if the i2c-mux child node does not exist. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun- i2c-mux 15*4882a593Smuzhiyun For i2c multiplexers/switches that have child nodes that are a mixture 16*4882a593Smuzhiyun of both i2c child busses and other child nodes, the 'i2c-mux' subnode 17*4882a593Smuzhiyun can be used for populating the i2c child busses. If an 'i2c-mux' 18*4882a593Smuzhiyun subnode is present, only subnodes of this will be considered as i2c 19*4882a593Smuzhiyun child busses. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunRequired properties for the i2c-mux child node: 22*4882a593Smuzhiyun- #address-cells = <1>; 23*4882a593Smuzhiyun- #size-cells = <0>; 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunRequired properties for i2c child bus nodes: 26*4882a593Smuzhiyun- #address-cells = <1>; 27*4882a593Smuzhiyun- #size-cells = <0>; 28*4882a593Smuzhiyun- reg : The sub-bus number. 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunOptional properties for i2c child bus nodes: 31*4882a593Smuzhiyun- Other properties specific to the multiplexer/switch hardware. 32*4882a593Smuzhiyun- Child nodes conforming to i2c bus binding 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunExample : 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* 38*4882a593Smuzhiyun An NXP pca9548 8 channel I2C multiplexer at address 0x70 39*4882a593Smuzhiyun with two NXP pca8574 GPIO expanders attached, one each to 40*4882a593Smuzhiyun ports 3 and 4. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun mux@70 { 44*4882a593Smuzhiyun compatible = "nxp,pca9548"; 45*4882a593Smuzhiyun reg = <0x70>; 46*4882a593Smuzhiyun #address-cells = <1>; 47*4882a593Smuzhiyun #size-cells = <0>; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun i2c@3 { 50*4882a593Smuzhiyun #address-cells = <1>; 51*4882a593Smuzhiyun #size-cells = <0>; 52*4882a593Smuzhiyun reg = <3>; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun gpio1: gpio@38 { 55*4882a593Smuzhiyun compatible = "nxp,pca8574"; 56*4882a593Smuzhiyun reg = <0x38>; 57*4882a593Smuzhiyun #gpio-cells = <2>; 58*4882a593Smuzhiyun gpio-controller; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun i2c@4 { 62*4882a593Smuzhiyun #address-cells = <1>; 63*4882a593Smuzhiyun #size-cells = <0>; 64*4882a593Smuzhiyun reg = <4>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun gpio2: gpio@38 { 67*4882a593Smuzhiyun compatible = "nxp,pca8574"; 68*4882a593Smuzhiyun reg = <0x38>; 69*4882a593Smuzhiyun #gpio-cells = <2>; 70*4882a593Smuzhiyun gpio-controller; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun }; 74