1*4882a593SmuzhiyunGeneral Purpose I2C Bus Mux 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis binding describes an I2C bus multiplexer that uses a mux controller 4*4882a593Smuzhiyunfrom the mux subsystem to route the I2C signals. 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun .-----. .-----. 7*4882a593Smuzhiyun | dev | | dev | 8*4882a593Smuzhiyun .------------. '-----' '-----' 9*4882a593Smuzhiyun | SoC | | | 10*4882a593Smuzhiyun | | .--------+--------' 11*4882a593Smuzhiyun | .------. | .------+ child bus A, on MUX value set to 0 12*4882a593Smuzhiyun | | I2C |-|--| Mux | 13*4882a593Smuzhiyun | '------' | '--+---+ child bus B, on MUX value set to 1 14*4882a593Smuzhiyun | .------. | | '----------+--------+--------. 15*4882a593Smuzhiyun | | MUX- | | | | | | 16*4882a593Smuzhiyun | | Ctrl |-|-----+ .-----. .-----. .-----. 17*4882a593Smuzhiyun | '------' | | dev | | dev | | dev | 18*4882a593Smuzhiyun '------------' '-----' '-----' '-----' 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunRequired properties: 21*4882a593Smuzhiyun- compatible: i2c-mux 22*4882a593Smuzhiyun- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side 23*4882a593Smuzhiyun port is connected to. 24*4882a593Smuzhiyun- mux-controls: The phandle of the mux controller to use for operating the 25*4882a593Smuzhiyun mux. 26*4882a593Smuzhiyun* Standard I2C mux properties. See i2c-mux.txt in this directory. 27*4882a593Smuzhiyun* I2C child bus nodes. See i2c-mux.txt in this directory. The sub-bus number 28*4882a593Smuzhiyun is also the mux-controller state described in ../mux/mux-controller.txt 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunOptional properties: 31*4882a593Smuzhiyun- mux-locked: If present, explicitly allow unrelated I2C transactions on the 32*4882a593Smuzhiyun parent I2C adapter at these times: 33*4882a593Smuzhiyun + during setup of the multiplexer 34*4882a593Smuzhiyun + between setup of the multiplexer and the child bus I2C transaction 35*4882a593Smuzhiyun + between the child bus I2C transaction and releasing of the multiplexer 36*4882a593Smuzhiyun + during releasing of the multiplexer 37*4882a593Smuzhiyun However, I2C transactions to devices behind all I2C multiplexers connected 38*4882a593Smuzhiyun to the same parent adapter that this multiplexer is connected to are blocked 39*4882a593Smuzhiyun for the full duration of the complete multiplexed I2C transaction (i.e. 40*4882a593Smuzhiyun including the times covered by the above list). 41*4882a593Smuzhiyun If mux-locked is not present, the multiplexer is assumed to be parent-locked. 42*4882a593Smuzhiyun This means that no unrelated I2C transactions are allowed on the parent I2C 43*4882a593Smuzhiyun adapter for the complete multiplexed I2C transaction. 44*4882a593Smuzhiyun The properties of mux-locked and parent-locked multiplexers are discussed 45*4882a593Smuzhiyun in more detail in Documentation/i2c/i2c-topology.rst. 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunFor each i2c child node, an I2C child bus will be created. They will 48*4882a593Smuzhiyunbe numbered based on their order in the device tree. 49*4882a593Smuzhiyun 50*4882a593SmuzhiyunWhenever an access is made to a device on a child bus, the value set 51*4882a593Smuzhiyunin the relevant node's reg property will be set as the state in the 52*4882a593Smuzhiyunmux controller. 53*4882a593Smuzhiyun 54*4882a593SmuzhiyunExample: 55*4882a593Smuzhiyun mux: mux-controller { 56*4882a593Smuzhiyun compatible = "gpio-mux"; 57*4882a593Smuzhiyun #mux-control-cells = <0>; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, 60*4882a593Smuzhiyun <&pioA 1 GPIO_ACTIVE_HIGH>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun i2c-mux { 64*4882a593Smuzhiyun compatible = "i2c-mux"; 65*4882a593Smuzhiyun mux-locked; 66*4882a593Smuzhiyun i2c-parent = <&i2c1>; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun mux-controls = <&mux>; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #address-cells = <1>; 71*4882a593Smuzhiyun #size-cells = <0>; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun i2c@1 { 74*4882a593Smuzhiyun reg = <1>; 75*4882a593Smuzhiyun #address-cells = <1>; 76*4882a593Smuzhiyun #size-cells = <0>; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun ssd1307: oled@3c { 79*4882a593Smuzhiyun compatible = "solomon,ssd1307fb-i2c"; 80*4882a593Smuzhiyun reg = <0x3c>; 81*4882a593Smuzhiyun pwms = <&pwm 4 3000>; 82*4882a593Smuzhiyun reset-gpios = <&gpio2 7 1>; 83*4882a593Smuzhiyun reset-active-low; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun i2c@3 { 88*4882a593Smuzhiyun reg = <3>; 89*4882a593Smuzhiyun #address-cells = <1>; 90*4882a593Smuzhiyun #size-cells = <0>; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun pca9555: pca9555@20 { 93*4882a593Smuzhiyun compatible = "nxp,pca9555"; 94*4882a593Smuzhiyun gpio-controller; 95*4882a593Smuzhiyun #gpio-cells = <2>; 96*4882a593Smuzhiyun reg = <0x20>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun }; 100