1*4882a593SmuzhiyunGPIO-based I2C Bus Mux 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis binding describes an I2C bus multiplexer that uses GPIOs to 4*4882a593Smuzhiyunroute the I2C signals. 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun +-----+ +-----+ 7*4882a593Smuzhiyun | dev | | dev | 8*4882a593Smuzhiyun +------------+ +-----+ +-----+ 9*4882a593Smuzhiyun | SoC | | | 10*4882a593Smuzhiyun | | /--------+--------+ 11*4882a593Smuzhiyun | +------+ | +------+ child bus A, on GPIO value set to 0 12*4882a593Smuzhiyun | | I2C |-|--| Mux | 13*4882a593Smuzhiyun | +------+ | +--+---+ child bus B, on GPIO value set to 1 14*4882a593Smuzhiyun | | | \----------+--------+--------+ 15*4882a593Smuzhiyun | +------+ | | | | | 16*4882a593Smuzhiyun | | GPIO |-|-----+ +-----+ +-----+ +-----+ 17*4882a593Smuzhiyun | +------+ | | dev | | dev | | dev | 18*4882a593Smuzhiyun +------------+ +-----+ +-----+ +-----+ 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunRequired properties: 21*4882a593Smuzhiyun- compatible: i2c-mux-gpio 22*4882a593Smuzhiyun- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side 23*4882a593Smuzhiyun port is connected to. 24*4882a593Smuzhiyun- mux-gpios: list of gpios used to control the muxer 25*4882a593Smuzhiyun* Standard I2C mux properties. See i2c-mux.txt in this directory. 26*4882a593Smuzhiyun* I2C child bus nodes. See i2c-mux.txt in this directory. 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunOptional properties: 29*4882a593Smuzhiyun- idle-state: value to set the muxer to when idle. When no value is 30*4882a593Smuzhiyun given, it defaults to the last value used. 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunFor each i2c child node, an I2C child bus will be created. They will 33*4882a593Smuzhiyunbe numbered based on their order in the device tree. 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunWhenever an access is made to a device on a child bus, the value set 36*4882a593Smuzhiyunin the relevant node's reg property will be output using the list of 37*4882a593SmuzhiyunGPIOs, the first in the list holding the least-significant value. 38*4882a593Smuzhiyun 39*4882a593SmuzhiyunIf an idle state is defined, using the idle-state (optional) property, 40*4882a593Smuzhiyunwhenever an access is not being made to a device on a child bus, the 41*4882a593SmuzhiyunGPIOs will be set according to the idle value. 42*4882a593Smuzhiyun 43*4882a593SmuzhiyunIf an idle state is not defined, the most recently used value will be 44*4882a593Smuzhiyunleft programmed into hardware whenever no access is being made to a 45*4882a593Smuzhiyundevice on a child bus. 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunExample: 48*4882a593Smuzhiyun i2cmux { 49*4882a593Smuzhiyun compatible = "i2c-mux-gpio"; 50*4882a593Smuzhiyun #address-cells = <1>; 51*4882a593Smuzhiyun #size-cells = <0>; 52*4882a593Smuzhiyun mux-gpios = <&gpio1 22 0 &gpio1 23 0>; 53*4882a593Smuzhiyun i2c-parent = <&i2c1>; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun i2c@1 { 56*4882a593Smuzhiyun reg = <1>; 57*4882a593Smuzhiyun #address-cells = <1>; 58*4882a593Smuzhiyun #size-cells = <0>; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun ssd1307: oled@3c { 61*4882a593Smuzhiyun compatible = "solomon,ssd1307fb-i2c"; 62*4882a593Smuzhiyun reg = <0x3c>; 63*4882a593Smuzhiyun pwms = <&pwm 4 3000>; 64*4882a593Smuzhiyun reset-gpios = <&gpio2 7 1>; 65*4882a593Smuzhiyun reset-active-low; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun i2c@3 { 70*4882a593Smuzhiyun reg = <3>; 71*4882a593Smuzhiyun #address-cells = <1>; 72*4882a593Smuzhiyun #size-cells = <0>; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun pca9555: pca9555@20 { 75*4882a593Smuzhiyun compatible = "nxp,pca9555"; 76*4882a593Smuzhiyun gpio-controller; 77*4882a593Smuzhiyun #gpio-cells = <2>; 78*4882a593Smuzhiyun reg = <0x20>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun }; 82