1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/i2c/i2c-imx-lpi2c.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Freescale Low Power Inter IC (LPI2C) for i.MX 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Anson Huang <Anson.Huang@nxp.com> 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunallOf: 13*4882a593Smuzhiyun - $ref: /schemas/i2c/i2c-controller.yaml# 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun oneOf: 18*4882a593Smuzhiyun - enum: 19*4882a593Smuzhiyun - fsl,imx7ulp-lpi2c 20*4882a593Smuzhiyun - fsl,imx8qm-lpi2c 21*4882a593Smuzhiyun - items: 22*4882a593Smuzhiyun - const: fsl,imx8qxp-lpi2c 23*4882a593Smuzhiyun - const: fsl,imx7ulp-lpi2c 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun reg: 26*4882a593Smuzhiyun maxItems: 1 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun interrupts: 29*4882a593Smuzhiyun maxItems: 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun assigned-clock-parents: true 32*4882a593Smuzhiyun assigned-clock-rates: true 33*4882a593Smuzhiyun assigned-clocks: true 34*4882a593Smuzhiyun clock-frequency: true 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun clock-names: 37*4882a593Smuzhiyun maxItems: 1 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun clocks: 40*4882a593Smuzhiyun maxItems: 1 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun power-domains: 43*4882a593Smuzhiyun maxItems: 1 44*4882a593Smuzhiyun 45*4882a593Smuzhiyunrequired: 46*4882a593Smuzhiyun - compatible 47*4882a593Smuzhiyun - reg 48*4882a593Smuzhiyun - interrupts 49*4882a593Smuzhiyun - clocks 50*4882a593Smuzhiyun 51*4882a593SmuzhiyununevaluatedProperties: false 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunexamples: 54*4882a593Smuzhiyun - | 55*4882a593Smuzhiyun #include <dt-bindings/clock/imx7ulp-clock.h> 56*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun i2c@40a50000 { 59*4882a593Smuzhiyun compatible = "fsl,imx7ulp-lpi2c"; 60*4882a593Smuzhiyun reg = <0x40A50000 0x10000>; 61*4882a593Smuzhiyun interrupt-parent = <&intc>; 62*4882a593Smuzhiyun interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 63*4882a593Smuzhiyun clocks = <&clks IMX7ULP_CLK_LPI2C7>; 64*4882a593Smuzhiyun }; 65