1*4882a593SmuzhiyunDevice tree configuration for the I2C busses on the AST24XX, AST25XX, and AST26XX SoCs. 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired Properties: 4*4882a593Smuzhiyun- #address-cells : should be 1 5*4882a593Smuzhiyun- #size-cells : should be 0 6*4882a593Smuzhiyun- reg : address offset and range of bus 7*4882a593Smuzhiyun- compatible : should be "aspeed,ast2400-i2c-bus" 8*4882a593Smuzhiyun or "aspeed,ast2500-i2c-bus" 9*4882a593Smuzhiyun or "aspeed,ast2600-i2c-bus" 10*4882a593Smuzhiyun- clocks : root clock of bus, should reference the APB 11*4882a593Smuzhiyun clock in the second cell 12*4882a593Smuzhiyun- resets : phandle to reset controller with the reset number in 13*4882a593Smuzhiyun the second cell 14*4882a593Smuzhiyun- interrupts : interrupt number 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunOptional Properties: 17*4882a593Smuzhiyun- bus-frequency : frequency of the bus clock in Hz defaults to 100 kHz when not 18*4882a593Smuzhiyun specified 19*4882a593Smuzhiyun- multi-master : states that there is another master active on this bus. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunExample: 22*4882a593Smuzhiyun 23*4882a593Smuzhiyuni2c { 24*4882a593Smuzhiyun compatible = "simple-bus"; 25*4882a593Smuzhiyun #address-cells = <1>; 26*4882a593Smuzhiyun #size-cells = <1>; 27*4882a593Smuzhiyun ranges = <0 0x1e78a000 0x1000>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun i2c_ic: interrupt-controller@0 { 30*4882a593Smuzhiyun #interrupt-cells = <1>; 31*4882a593Smuzhiyun compatible = "aspeed,ast2400-i2c-ic"; 32*4882a593Smuzhiyun reg = <0x0 0x40>; 33*4882a593Smuzhiyun interrupts = <12>; 34*4882a593Smuzhiyun interrupt-controller; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun i2c0: i2c-bus@40 { 38*4882a593Smuzhiyun #address-cells = <1>; 39*4882a593Smuzhiyun #size-cells = <0>; 40*4882a593Smuzhiyun #interrupt-cells = <1>; 41*4882a593Smuzhiyun reg = <0x40 0x40>; 42*4882a593Smuzhiyun compatible = "aspeed,ast2400-i2c-bus"; 43*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_APB>; 44*4882a593Smuzhiyun resets = <&syscon ASPEED_RESET_I2C>; 45*4882a593Smuzhiyun bus-frequency = <100000>; 46*4882a593Smuzhiyun interrupts = <0>; 47*4882a593Smuzhiyun interrupt-parent = <&i2c_ic>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun}; 50