xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#"
5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Cadence I2C controller Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Michal Simek <michal.simek@xilinx.com>
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunallOf:
13*4882a593Smuzhiyun  - $ref: /schemas/i2c/i2c-controller.yaml#
14*4882a593Smuzhiyun
15*4882a593Smuzhiyunproperties:
16*4882a593Smuzhiyun  compatible:
17*4882a593Smuzhiyun    enum:
18*4882a593Smuzhiyun      - cdns,i2c-r1p10 # cadence i2c controller version 1.0
19*4882a593Smuzhiyun      - cdns,i2c-r1p14 # cadence i2c controller version 1.4
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun  reg:
22*4882a593Smuzhiyun    maxItems: 1
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun  clocks:
25*4882a593Smuzhiyun    minItems: 1
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun  interrupts:
28*4882a593Smuzhiyun    maxItems: 1
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun  clock-frequency:
31*4882a593Smuzhiyun    minimum: 1
32*4882a593Smuzhiyun    maximum: 400000
33*4882a593Smuzhiyun    description: |
34*4882a593Smuzhiyun      Desired operating frequency, in Hz, of the bus.
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun  clock-name:
37*4882a593Smuzhiyun    const: pclk
38*4882a593Smuzhiyun    description: |
39*4882a593Smuzhiyun      Input clock name.
40*4882a593Smuzhiyun
41*4882a593Smuzhiyunrequired:
42*4882a593Smuzhiyun  - compatible
43*4882a593Smuzhiyun  - reg
44*4882a593Smuzhiyun  - clocks
45*4882a593Smuzhiyun  - interrupts
46*4882a593Smuzhiyun
47*4882a593SmuzhiyununevaluatedProperties: false
48*4882a593Smuzhiyun
49*4882a593Smuzhiyunexamples:
50*4882a593Smuzhiyun  - |
51*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/arm-gic.h>
52*4882a593Smuzhiyun    i2c@e0004000 {
53*4882a593Smuzhiyun        compatible = "cdns,i2c-r1p10";
54*4882a593Smuzhiyun        clocks = <&clkc 38>;
55*4882a593Smuzhiyun        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
56*4882a593Smuzhiyun        reg = <0xe0004000 0x1000>;
57*4882a593Smuzhiyun        clock-frequency = <400000>;
58*4882a593Smuzhiyun        #address-cells = <1>;
59*4882a593Smuzhiyun        #size-cells = <0>;
60*4882a593Smuzhiyun    };
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