1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: TI HwSpinlock for OMAP and K3 based SoCs 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Suman Anna <s-anna@ti.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun compatible: 14*4882a593Smuzhiyun enum: 15*4882a593Smuzhiyun - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs 16*4882a593Smuzhiyun - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun reg: 19*4882a593Smuzhiyun maxItems: 1 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun "#hwlock-cells": 22*4882a593Smuzhiyun const: 1 23*4882a593Smuzhiyun description: | 24*4882a593Smuzhiyun The OMAP hwspinlock users will use a 0-indexed relative hwlock number as 25*4882a593Smuzhiyun the argument specifier value for requesting a specific hwspinlock within 26*4882a593Smuzhiyun a hwspinlock bank. 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun Please look at the generic hwlock binding for usage information for 29*4882a593Smuzhiyun consumers, "Documentation/devicetree/bindings/hwlock/hwlock.txt" 30*4882a593Smuzhiyun 31*4882a593Smuzhiyunrequired: 32*4882a593Smuzhiyun - compatible 33*4882a593Smuzhiyun - reg 34*4882a593Smuzhiyun - "#hwlock-cells" 35*4882a593Smuzhiyun 36*4882a593SmuzhiyunadditionalProperties: false 37*4882a593Smuzhiyun 38*4882a593Smuzhiyunexamples: 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun - | 41*4882a593Smuzhiyun /* OMAP4 SoCs */ 42*4882a593Smuzhiyun hwspinlock: spinlock@4a0f6000 { 43*4882a593Smuzhiyun compatible = "ti,omap4-hwspinlock"; 44*4882a593Smuzhiyun reg = <0x4a0f6000 0x1000>; 45*4882a593Smuzhiyun #hwlock-cells = <1>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun - | 49*4882a593Smuzhiyun / { 50*4882a593Smuzhiyun /* K3 AM65x SoCs */ 51*4882a593Smuzhiyun model = "Texas Instruments K3 AM654 SoC"; 52*4882a593Smuzhiyun compatible = "ti,am654-evm", "ti,am654"; 53*4882a593Smuzhiyun #address-cells = <2>; 54*4882a593Smuzhiyun #size-cells = <2>; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun bus@100000 { 57*4882a593Smuzhiyun compatible = "simple-bus"; 58*4882a593Smuzhiyun #address-cells = <2>; 59*4882a593Smuzhiyun #size-cells = <2>; 60*4882a593Smuzhiyun ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ 61*4882a593Smuzhiyun <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>; /* Main NavSS */ 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun bus@30800000 { 64*4882a593Smuzhiyun compatible = "simple-mfd"; 65*4882a593Smuzhiyun #address-cells = <2>; 66*4882a593Smuzhiyun #size-cells = <2>; 67*4882a593Smuzhiyun ranges = <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun spinlock@30e00000 { 70*4882a593Smuzhiyun compatible = "ti,am654-hwspinlock"; 71*4882a593Smuzhiyun reg = <0x00 0x30e00000 0x00 0x1000>; 72*4882a593Smuzhiyun #hwlock-cells = <1>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun }; 77