1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/gpu/vivante,gc.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Vivante GPU Bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyundescription: Vivante GPU core devices 10*4882a593Smuzhiyun 11*4882a593Smuzhiyunmaintainers: 12*4882a593Smuzhiyun - Lucas Stach <l.stach@pengutronix.de> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyunproperties: 15*4882a593Smuzhiyun compatible: 16*4882a593Smuzhiyun const: vivante,gc 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun reg: 19*4882a593Smuzhiyun maxItems: 1 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun interrupts: 22*4882a593Smuzhiyun maxItems: 1 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun '#cooling-cells': 25*4882a593Smuzhiyun const: 2 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun assigned-clock-parents: true 28*4882a593Smuzhiyun assigned-clock-rates: true 29*4882a593Smuzhiyun assigned-clocks: true 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun clocks: 32*4882a593Smuzhiyun items: 33*4882a593Smuzhiyun - description: AXI/master interface clock 34*4882a593Smuzhiyun - description: GPU core clock 35*4882a593Smuzhiyun - description: Shader clock (only required if GPU has feature PIPE_3D) 36*4882a593Smuzhiyun - description: AHB/slave interface clock (only required if GPU can gate 37*4882a593Smuzhiyun slave interface independently) 38*4882a593Smuzhiyun minItems: 1 39*4882a593Smuzhiyun maxItems: 4 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun clock-names: 42*4882a593Smuzhiyun items: 43*4882a593Smuzhiyun enum: [ bus, core, shader, reg ] 44*4882a593Smuzhiyun minItems: 1 45*4882a593Smuzhiyun maxItems: 4 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun resets: 48*4882a593Smuzhiyun maxItems: 1 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun power-domains: 51*4882a593Smuzhiyun maxItems: 1 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunrequired: 54*4882a593Smuzhiyun - compatible 55*4882a593Smuzhiyun - reg 56*4882a593Smuzhiyun - interrupts 57*4882a593Smuzhiyun - clocks 58*4882a593Smuzhiyun - clock-names 59*4882a593Smuzhiyun 60*4882a593SmuzhiyunadditionalProperties: false 61*4882a593Smuzhiyun 62*4882a593Smuzhiyunexamples: 63*4882a593Smuzhiyun - | 64*4882a593Smuzhiyun #include <dt-bindings/clock/imx6qdl-clock.h> 65*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 66*4882a593Smuzhiyun gpu@130000 { 67*4882a593Smuzhiyun compatible = "vivante,gc"; 68*4882a593Smuzhiyun reg = <0x00130000 0x4000>; 69*4882a593Smuzhiyun interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; 70*4882a593Smuzhiyun clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>, 71*4882a593Smuzhiyun <&clks IMX6QDL_CLK_GPU3D_CORE>, 72*4882a593Smuzhiyun <&clks IMX6QDL_CLK_GPU3D_SHADER>; 73*4882a593Smuzhiyun clock-names = "bus", "core", "shader"; 74*4882a593Smuzhiyun power-domains = <&gpc 1>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun... 78