1*4882a593SmuzhiyunBroadcom V3D GPU 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunOnly the Broadcom V3D 3.x and newer GPUs are covered by this binding. 4*4882a593SmuzhiyunFor V3D 2.x, see brcm,bcm-vc4.txt. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d" 8*4882a593Smuzhiyun- reg: Physical base addresses and lengths of the register areas 9*4882a593Smuzhiyun- reg-names: Names for the register areas. The "hub" and "core0" 10*4882a593Smuzhiyun register areas are always required. The "gca" register area 11*4882a593Smuzhiyun is required if the GCA cache controller is present. The 12*4882a593Smuzhiyun "bridge" register area is required if an external reset 13*4882a593Smuzhiyun controller is not present. 14*4882a593Smuzhiyun- interrupts: The interrupt numbers. The first interrupt is for the hub, 15*4882a593Smuzhiyun while the following interrupts are separate interrupt lines 16*4882a593Smuzhiyun for the cores (if they don't share the hub's interrupt). 17*4882a593Smuzhiyun See bindings/interrupt-controller/interrupts.txt 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunOptional properties: 20*4882a593Smuzhiyun- clocks: The core clock the unit runs on 21*4882a593Smuzhiyun- resets: The reset line for v3d, if not using a mapping of the bridge 22*4882a593Smuzhiyun See bindings/reset/reset.txt 23*4882a593Smuzhiyun 24*4882a593Smuzhiyunv3d { 25*4882a593Smuzhiyun compatible = "brcm,7268-v3d"; 26*4882a593Smuzhiyun reg = <0xf1204000 0x100>, 27*4882a593Smuzhiyun <0xf1200000 0x4000>, 28*4882a593Smuzhiyun <0xf1208000 0x4000>, 29*4882a593Smuzhiyun <0xf1204100 0x100>; 30*4882a593Smuzhiyun reg-names = "bridge", "hub", "core0", "gca"; 31*4882a593Smuzhiyun interrupts = <0 78 4>, 32*4882a593Smuzhiyun <0 77 4>; 33*4882a593Smuzhiyun}; 34