xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Synopsys DesignWare APB GPIO controller
8*4882a593Smuzhiyun
9*4882a593Smuzhiyundescription: |
10*4882a593Smuzhiyun  Synopsys DesignWare GPIO controllers have a configurable number of ports,
11*4882a593Smuzhiyun  each of which are intended to be represented as child nodes with the generic
12*4882a593Smuzhiyun  GPIO-controller properties as desribed in this bindings file.
13*4882a593Smuzhiyun
14*4882a593Smuzhiyunmaintainers:
15*4882a593Smuzhiyun  - Hoan Tran <hoan@os.amperecomputing.com>
16*4882a593Smuzhiyun  - Serge Semin <fancer.lancer@gmail.com>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyunproperties:
19*4882a593Smuzhiyun  $nodename:
20*4882a593Smuzhiyun    pattern: "^gpio@[0-9a-f]+$"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  compatible:
23*4882a593Smuzhiyun    const: snps,dw-apb-gpio
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun  "#address-cells":
26*4882a593Smuzhiyun    const: 1
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun  "#size-cells":
29*4882a593Smuzhiyun    const: 0
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun  reg:
32*4882a593Smuzhiyun    maxItems: 1
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun  clocks:
35*4882a593Smuzhiyun    minItems: 1
36*4882a593Smuzhiyun    items:
37*4882a593Smuzhiyun      - description: APB interface clock source
38*4882a593Smuzhiyun      - description: DW GPIO debounce reference clock source
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun  clock-names:
41*4882a593Smuzhiyun    minItems: 1
42*4882a593Smuzhiyun    items:
43*4882a593Smuzhiyun      - const: bus
44*4882a593Smuzhiyun      - const: db
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  resets:
47*4882a593Smuzhiyun    maxItems: 1
48*4882a593Smuzhiyun
49*4882a593SmuzhiyunpatternProperties:
50*4882a593Smuzhiyun  "^gpio-(port|controller)@[0-9a-f]+$":
51*4882a593Smuzhiyun    type: object
52*4882a593Smuzhiyun    properties:
53*4882a593Smuzhiyun      compatible:
54*4882a593Smuzhiyun        const: snps,dw-apb-gpio-port
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun      reg:
57*4882a593Smuzhiyun        maxItems: 1
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun      gpio-controller: true
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun      '#gpio-cells':
62*4882a593Smuzhiyun        const: 2
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun      ngpios:
65*4882a593Smuzhiyun        default: 32
66*4882a593Smuzhiyun        minimum: 1
67*4882a593Smuzhiyun        maximum: 32
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun      snps,nr-gpios:
70*4882a593Smuzhiyun        description: The number of GPIO pins exported by the port.
71*4882a593Smuzhiyun        deprecated: true
72*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32
73*4882a593Smuzhiyun        default: 32
74*4882a593Smuzhiyun        minimum: 1
75*4882a593Smuzhiyun        maximum: 32
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun      interrupts:
78*4882a593Smuzhiyun        description: |
79*4882a593Smuzhiyun          The interrupts to the parent controller raised when GPIOs generate
80*4882a593Smuzhiyun          the interrupts. If the controller provides one combined interrupt
81*4882a593Smuzhiyun          for all GPIOs, specify a single interrupt. If the controller provides
82*4882a593Smuzhiyun          one interrupt for each GPIO, provide a list of interrupts that
83*4882a593Smuzhiyun          correspond to each of the GPIO pins.
84*4882a593Smuzhiyun        minItems: 1
85*4882a593Smuzhiyun        maxItems: 32
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun      interrupt-controller: true
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun      '#interrupt-cells':
90*4882a593Smuzhiyun        const: 2
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun    required:
93*4882a593Smuzhiyun      - compatible
94*4882a593Smuzhiyun      - reg
95*4882a593Smuzhiyun      - gpio-controller
96*4882a593Smuzhiyun      - '#gpio-cells'
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun    dependencies:
99*4882a593Smuzhiyun      interrupt-controller: [ interrupts ]
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun    additionalProperties: false
102*4882a593Smuzhiyun
103*4882a593SmuzhiyunadditionalProperties: false
104*4882a593Smuzhiyun
105*4882a593Smuzhiyunrequired:
106*4882a593Smuzhiyun  - compatible
107*4882a593Smuzhiyun  - reg
108*4882a593Smuzhiyun  - "#address-cells"
109*4882a593Smuzhiyun  - "#size-cells"
110*4882a593Smuzhiyun
111*4882a593Smuzhiyunexamples:
112*4882a593Smuzhiyun  - |
113*4882a593Smuzhiyun    gpio: gpio@20000 {
114*4882a593Smuzhiyun      compatible = "snps,dw-apb-gpio";
115*4882a593Smuzhiyun      reg = <0x20000 0x1000>;
116*4882a593Smuzhiyun      #address-cells = <1>;
117*4882a593Smuzhiyun      #size-cells = <0>;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun      porta: gpio-port@0 {
120*4882a593Smuzhiyun        compatible = "snps,dw-apb-gpio-port";
121*4882a593Smuzhiyun        reg = <0>;
122*4882a593Smuzhiyun        gpio-controller;
123*4882a593Smuzhiyun        #gpio-cells = <2>;
124*4882a593Smuzhiyun        snps,nr-gpios = <8>;
125*4882a593Smuzhiyun        interrupt-controller;
126*4882a593Smuzhiyun        #interrupt-cells = <2>;
127*4882a593Smuzhiyun        interrupt-parent = <&vic1>;
128*4882a593Smuzhiyun        interrupts = <0>;
129*4882a593Smuzhiyun      };
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun      portb: gpio-port@1 {
132*4882a593Smuzhiyun        compatible = "snps,dw-apb-gpio-port";
133*4882a593Smuzhiyun        reg = <1>;
134*4882a593Smuzhiyun        gpio-controller;
135*4882a593Smuzhiyun        #gpio-cells = <2>;
136*4882a593Smuzhiyun        snps,nr-gpios = <8>;
137*4882a593Smuzhiyun      };
138*4882a593Smuzhiyun    };
139*4882a593Smuzhiyun...
140