1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/gpio/sifive,gpio.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: SiFive GPIO controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Yash Shah <yash.shah@sifive.com> 11*4882a593Smuzhiyun - Paul Walmsley <paul.walmsley@sifive.com> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunproperties: 14*4882a593Smuzhiyun compatible: 15*4882a593Smuzhiyun items: 16*4882a593Smuzhiyun - const: sifive,fu540-c000-gpio 17*4882a593Smuzhiyun - const: sifive,gpio0 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun reg: 20*4882a593Smuzhiyun maxItems: 1 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun interrupts: 23*4882a593Smuzhiyun description: 24*4882a593Smuzhiyun interrupt mapping one per GPIO. Maximum 16 GPIOs. 25*4882a593Smuzhiyun minItems: 1 26*4882a593Smuzhiyun maxItems: 16 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun interrupt-controller: true 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun "#interrupt-cells": 31*4882a593Smuzhiyun const: 2 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun clocks: 34*4882a593Smuzhiyun maxItems: 1 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun "#gpio-cells": 37*4882a593Smuzhiyun const: 2 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun gpio-controller: true 40*4882a593Smuzhiyun 41*4882a593Smuzhiyunrequired: 42*4882a593Smuzhiyun - compatible 43*4882a593Smuzhiyun - reg 44*4882a593Smuzhiyun - interrupts 45*4882a593Smuzhiyun - interrupt-controller 46*4882a593Smuzhiyun - "#interrupt-cells" 47*4882a593Smuzhiyun - clocks 48*4882a593Smuzhiyun - "#gpio-cells" 49*4882a593Smuzhiyun - gpio-controller 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunadditionalProperties: false 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunexamples: 54*4882a593Smuzhiyun - | 55*4882a593Smuzhiyun #include <dt-bindings/clock/sifive-fu540-prci.h> 56*4882a593Smuzhiyun gpio@10060000 { 57*4882a593Smuzhiyun compatible = "sifive,fu540-c000-gpio", "sifive,gpio0"; 58*4882a593Smuzhiyun interrupt-parent = <&plic>; 59*4882a593Smuzhiyun interrupts = <7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22>; 60*4882a593Smuzhiyun reg = <0x10060000 0x1000>; 61*4882a593Smuzhiyun clocks = <&tlclk PRCI_CLK_TLCLK>; 62*4882a593Smuzhiyun gpio-controller; 63*4882a593Smuzhiyun #gpio-cells = <2>; 64*4882a593Smuzhiyun interrupt-controller; 65*4882a593Smuzhiyun #interrupt-cells = <2>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun... 69