1*4882a593SmuzhiyunNXP LPC18xx/43xx GPIO controller Device Tree Bindings 2*4882a593Smuzhiyun----------------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun- compatible : Should be "nxp,lpc1850-gpio" 6*4882a593Smuzhiyun- reg : List of addresses and lengths of the GPIO controller 7*4882a593Smuzhiyun register sets 8*4882a593Smuzhiyun- reg-names : Should be "gpio", "gpio-pin-ic", "gpio-group0-ic" and 9*4882a593Smuzhiyun "gpio-gpoup1-ic" 10*4882a593Smuzhiyun- clocks : Phandle and clock specifier pair for GPIO controller 11*4882a593Smuzhiyun- resets : Phandle and reset specifier pair for GPIO controller 12*4882a593Smuzhiyun- gpio-controller : Marks the device node as a GPIO controller 13*4882a593Smuzhiyun- #gpio-cells : Should be two: 14*4882a593Smuzhiyun - The first cell is the GPIO line number 15*4882a593Smuzhiyun - The second cell is used to specify polarity 16*4882a593Smuzhiyun- interrupt-controller : Marks the device node as an interrupt controller 17*4882a593Smuzhiyun- #interrupt-cells : Should be two: 18*4882a593Smuzhiyun - The first cell is an interrupt number within 19*4882a593Smuzhiyun 0..9 range, for GPIO pin interrupts it is equal 20*4882a593Smuzhiyun to 'nxp,gpio-pin-interrupt' property value of 21*4882a593Smuzhiyun GPIO pin configuration, 8 is for GPIO GROUP0 22*4882a593Smuzhiyun interrupt, 9 is for GPIO GROUP1 interrupt 23*4882a593Smuzhiyun - The second cell is used to specify interrupt type 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunOptional properties: 26*4882a593Smuzhiyun- gpio-ranges : Mapping between GPIO and pinctrl 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunExample: 29*4882a593Smuzhiyun#define LPC_GPIO(port, pin) (port * 32 + pin) 30*4882a593Smuzhiyun#define LPC_PIN(port, pin) (0x##port * 32 + pin) 31*4882a593Smuzhiyun 32*4882a593Smuzhiyungpio: gpio@400f4000 { 33*4882a593Smuzhiyun compatible = "nxp,lpc1850-gpio"; 34*4882a593Smuzhiyun reg = <0x400f4000 0x4000>, <0x40087000 0x1000>, 35*4882a593Smuzhiyun <0x40088000 0x1000>, <0x40089000 0x1000>; 36*4882a593Smuzhiyun reg-names = "gpio", "gpio-pin-ic", 37*4882a593Smuzhiyun "gpio-group0-ic", "gpio-gpoup1-ic"; 38*4882a593Smuzhiyun clocks = <&ccu1 CLK_CPU_GPIO>; 39*4882a593Smuzhiyun resets = <&rgu 28>; 40*4882a593Smuzhiyun gpio-controller; 41*4882a593Smuzhiyun #gpio-cells = <2>; 42*4882a593Smuzhiyun interrupt-controller; 43*4882a593Smuzhiyun #interrupt-cells = <2>; 44*4882a593Smuzhiyun gpio-ranges = <&pinctrl LPC_GPIO(0,0) LPC_PIN(0,0) 2>, 45*4882a593Smuzhiyun ... 46*4882a593Smuzhiyun <&pinctrl LPC_GPIO(7,19) LPC_PIN(f,5) 7>; 47*4882a593Smuzhiyun}; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyungpio_joystick { 50*4882a593Smuzhiyun compatible = "gpio-keys"; 51*4882a593Smuzhiyun ... 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun button0 { 54*4882a593Smuzhiyun ... 55*4882a593Smuzhiyun interrupt-parent = <&gpio>; 56*4882a593Smuzhiyun interrupts = <1 IRQ_TYPE_EDGE_BOTH>; 57*4882a593Smuzhiyun gpios = <&gpio LPC_GPIO(4,8) GPIO_ACTIVE_LOW>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun}; 60