1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/gpio/mrvl-gpio.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Marvell PXA GPIO controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Linus Walleij <linus.walleij@linaro.org> 11*4882a593Smuzhiyun - Bartosz Golaszewski <bgolaszewski@baylibre.com> 12*4882a593Smuzhiyun - Rob Herring <robh+dt@kernel.org> 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunallOf: 15*4882a593Smuzhiyun - if: 16*4882a593Smuzhiyun properties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun contains: 19*4882a593Smuzhiyun enum: 20*4882a593Smuzhiyun - intel,pxa25x-gpio 21*4882a593Smuzhiyun - intel,pxa26x-gpio 22*4882a593Smuzhiyun - intel,pxa27x-gpio 23*4882a593Smuzhiyun - intel,pxa3xx-gpio 24*4882a593Smuzhiyun then: 25*4882a593Smuzhiyun properties: 26*4882a593Smuzhiyun interrupts: 27*4882a593Smuzhiyun minItems: 3 28*4882a593Smuzhiyun maxItems: 3 29*4882a593Smuzhiyun interrupt-names: 30*4882a593Smuzhiyun items: 31*4882a593Smuzhiyun - const: gpio0 32*4882a593Smuzhiyun - const: gpio1 33*4882a593Smuzhiyun - const: gpio_mux 34*4882a593Smuzhiyun - if: 35*4882a593Smuzhiyun properties: 36*4882a593Smuzhiyun compatible: 37*4882a593Smuzhiyun contains: 38*4882a593Smuzhiyun enum: 39*4882a593Smuzhiyun - marvell,mmp-gpio 40*4882a593Smuzhiyun - marvell,mmp2-gpio 41*4882a593Smuzhiyun then: 42*4882a593Smuzhiyun properties: 43*4882a593Smuzhiyun interrupts: 44*4882a593Smuzhiyun maxItems: 1 45*4882a593Smuzhiyun interrupt-names: 46*4882a593Smuzhiyun items: 47*4882a593Smuzhiyun - const: gpio_mux 48*4882a593Smuzhiyun 49*4882a593Smuzhiyunproperties: 50*4882a593Smuzhiyun $nodename: 51*4882a593Smuzhiyun pattern: '^gpio@[0-9a-f]+$' 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun compatible: 54*4882a593Smuzhiyun enum: 55*4882a593Smuzhiyun - intel,pxa25x-gpio 56*4882a593Smuzhiyun - intel,pxa26x-gpio 57*4882a593Smuzhiyun - intel,pxa27x-gpio 58*4882a593Smuzhiyun - intel,pxa3xx-gpio 59*4882a593Smuzhiyun - marvell,mmp-gpio 60*4882a593Smuzhiyun - marvell,mmp2-gpio 61*4882a593Smuzhiyun - marvell,pxa93x-gpio 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun reg: 64*4882a593Smuzhiyun maxItems: 1 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun clocks: 67*4882a593Smuzhiyun maxItems: 1 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun resets: 70*4882a593Smuzhiyun maxItems: 1 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun ranges: true 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun '#address-cells': 75*4882a593Smuzhiyun const: 1 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun '#size-cells': 78*4882a593Smuzhiyun const: 1 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun gpio-controller: true 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun '#gpio-cells': 83*4882a593Smuzhiyun const: 2 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun gpio-ranges: 86*4882a593Smuzhiyun maxItems: 1 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun interrupts: true 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun interrupt-names: true 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun interrupt-controller: true 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun '#interrupt-cells': 95*4882a593Smuzhiyun const: 2 96*4882a593Smuzhiyun 97*4882a593SmuzhiyunpatternProperties: 98*4882a593Smuzhiyun '^gpio@[0-9a-f]*$': 99*4882a593Smuzhiyun type: object 100*4882a593Smuzhiyun properties: 101*4882a593Smuzhiyun reg: 102*4882a593Smuzhiyun maxItems: 1 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun required: 105*4882a593Smuzhiyun - reg 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun additionalProperties: false 108*4882a593Smuzhiyun 109*4882a593Smuzhiyunrequired: 110*4882a593Smuzhiyun - compatible 111*4882a593Smuzhiyun - '#address-cells' 112*4882a593Smuzhiyun - '#size-cells' 113*4882a593Smuzhiyun - reg 114*4882a593Smuzhiyun - gpio-controller 115*4882a593Smuzhiyun - '#gpio-cells' 116*4882a593Smuzhiyun - interrupts 117*4882a593Smuzhiyun - interrupt-names 118*4882a593Smuzhiyun - interrupt-controller 119*4882a593Smuzhiyun - '#interrupt-cells' 120*4882a593Smuzhiyun 121*4882a593SmuzhiyunadditionalProperties: false 122*4882a593Smuzhiyun 123*4882a593Smuzhiyunexamples: 124*4882a593Smuzhiyun - | 125*4882a593Smuzhiyun #include <dt-bindings/clock/pxa-clock.h> 126*4882a593Smuzhiyun gpio@40e00000 { 127*4882a593Smuzhiyun compatible = "intel,pxa3xx-gpio"; 128*4882a593Smuzhiyun #address-cells = <1>; 129*4882a593Smuzhiyun #size-cells = <1>; 130*4882a593Smuzhiyun reg = <0x40e00000 0x10000>; 131*4882a593Smuzhiyun gpio-controller; 132*4882a593Smuzhiyun #gpio-cells = <2>; 133*4882a593Smuzhiyun interrupts = <8>, <9>, <10>; 134*4882a593Smuzhiyun interrupt-names = "gpio0", "gpio1", "gpio_mux"; 135*4882a593Smuzhiyun clocks = <&clks CLK_GPIO>; 136*4882a593Smuzhiyun interrupt-controller; 137*4882a593Smuzhiyun #interrupt-cells = <2>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun - | 140*4882a593Smuzhiyun #include <dt-bindings/clock/marvell,pxa910.h> 141*4882a593Smuzhiyun gpio@d4019000 { 142*4882a593Smuzhiyun compatible = "marvell,mmp-gpio"; 143*4882a593Smuzhiyun #address-cells = <1>; 144*4882a593Smuzhiyun #size-cells = <1>; 145*4882a593Smuzhiyun reg = <0xd4019000 0x1000>; 146*4882a593Smuzhiyun gpio-controller; 147*4882a593Smuzhiyun #gpio-cells = <2>; 148*4882a593Smuzhiyun interrupts = <49>; 149*4882a593Smuzhiyun interrupt-names = "gpio_mux"; 150*4882a593Smuzhiyun clocks = <&soc_clocks PXA910_CLK_GPIO>; 151*4882a593Smuzhiyun resets = <&soc_clocks PXA910_CLK_GPIO>; 152*4882a593Smuzhiyun interrupt-controller; 153*4882a593Smuzhiyun #interrupt-cells = <2>; 154*4882a593Smuzhiyun ranges; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun gpio@d4019000 { 157*4882a593Smuzhiyun reg = <0xd4019000 0x4>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun gpio@d4019004 { 161*4882a593Smuzhiyun reg = <0xd4019004 0x4>; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun gpio@d4019008 { 165*4882a593Smuzhiyun reg = <0xd4019008 0x4>; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun gpio@d4019100 { 169*4882a593Smuzhiyun reg = <0xd4019100 0x4>; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun... 174