1*4882a593Smuzhiyun* Atmel GPIO controller (PIO) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: "atmel,<chip>-gpio", where <chip> is at91rm9200 or at91sam9x5. 5*4882a593Smuzhiyun- reg: Should contain GPIO controller registers location and length 6*4882a593Smuzhiyun- interrupts: Should be the port interrupt shared by all the pins. 7*4882a593Smuzhiyun- #gpio-cells: Should be two. The first cell is the pin number and 8*4882a593Smuzhiyun the second cell is used to specify optional parameters to declare if the GPIO 9*4882a593Smuzhiyun is active high or low. See gpio.txt. 10*4882a593Smuzhiyun- gpio-controller: Marks the device node as a GPIO controller. 11*4882a593Smuzhiyun- interrupt-controller: Marks the device node as an interrupt controller. 12*4882a593Smuzhiyun- #interrupt-cells: Should be two. The first cell is the pin number and the 13*4882a593Smuzhiyun second cell is used to specify irq type flags, see the two cell description 14*4882a593Smuzhiyun in interrupt-controller/interrupts.txt for details. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunoptional properties: 17*4882a593Smuzhiyun- #gpio-lines: Number of gpio if absent 32. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun pioA: gpio@fffff200 { 22*4882a593Smuzhiyun compatible = "atmel,at91rm9200-gpio"; 23*4882a593Smuzhiyun reg = <0xfffff200 0x100>; 24*4882a593Smuzhiyun interrupts = <2 4>; 25*4882a593Smuzhiyun #gpio-cells = <2>; 26*4882a593Smuzhiyun gpio-controller; 27*4882a593Smuzhiyun #gpio-lines = <19>; 28*4882a593Smuzhiyun interrupt-controller; 29*4882a593Smuzhiyun #interrupt-cells = <2>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32