xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpio/gpio-pcf857x.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* PCF857x-compatible I/O expanders
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThe PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
4*4882a593Smuzhiyundriven high by a pull-up current source or driven low to ground. This combines
5*4882a593Smuzhiyunthe direction and output level into a single bit per line, which can't be read
6*4882a593Smuzhiyunback. We can't actually know at initialization time whether a line is configured
7*4882a593Smuzhiyun(a) as output and driving the signal low/high, or (b) as input and reporting a
8*4882a593Smuzhiyunlow/high value, without knowing the last value written since the chip came out
9*4882a593Smuzhiyunof reset (if any). The only reliable solution for setting up line direction is
10*4882a593Smuzhiyunthus to do it explicitly.
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunRequired Properties:
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun  - compatible: should be one of the following.
15*4882a593Smuzhiyun    - "maxim,max7328": For the Maxim MAX7378
16*4882a593Smuzhiyun    - "maxim,max7329": For the Maxim MAX7329
17*4882a593Smuzhiyun    - "nxp,pca8574": For the NXP PCA8574
18*4882a593Smuzhiyun    - "nxp,pca8575": For the NXP PCA8575
19*4882a593Smuzhiyun    - "nxp,pca9670": For the NXP PCA9670
20*4882a593Smuzhiyun    - "nxp,pca9671": For the NXP PCA9671
21*4882a593Smuzhiyun    - "nxp,pca9672": For the NXP PCA9672
22*4882a593Smuzhiyun    - "nxp,pca9673": For the NXP PCA9673
23*4882a593Smuzhiyun    - "nxp,pca9674": For the NXP PCA9674
24*4882a593Smuzhiyun    - "nxp,pca9675": For the NXP PCA9675
25*4882a593Smuzhiyun    - "nxp,pcf8574": For the NXP PCF8574
26*4882a593Smuzhiyun    - "nxp,pcf8574a": For the NXP PCF8574A
27*4882a593Smuzhiyun    - "nxp,pcf8575": For the NXP PCF8575
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun  - reg: I2C slave address.
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun  - gpio-controller: Marks the device node as a gpio controller.
32*4882a593Smuzhiyun  - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
33*4882a593Smuzhiyun    cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
34*4882a593Smuzhiyun    GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
35*4882a593Smuzhiyun
36*4882a593SmuzhiyunOptional Properties:
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun  - lines-initial-states: Bitmask that specifies the initial state of each
39*4882a593Smuzhiyun  line. When a bit is set to zero, the corresponding line will be initialized to
40*4882a593Smuzhiyun  the input (pulled-up) state. When the  bit is set to one, the line will be
41*4882a593Smuzhiyun  initialized the low-level output state. If the property is not specified
42*4882a593Smuzhiyun  all lines will be initialized to the input state.
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun  The I/O expander can detect input state changes, and thus optionally act as
45*4882a593Smuzhiyun  an interrupt controller. When the expander interrupt line is connected all the
46*4882a593Smuzhiyun  following properties must be set. For more information please see the
47*4882a593Smuzhiyun  interrupt controller device tree bindings documentation available at
48*4882a593Smuzhiyun  Documentation/devicetree/bindings/interrupt-controller/interrupts.txt.
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun  - interrupt-controller: Identifies the node as an interrupt controller.
51*4882a593Smuzhiyun  - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2.
52*4882a593Smuzhiyun  - interrupts: Interrupt specifier for the controllers interrupt.
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun
55*4882a593SmuzhiyunPlease refer to gpio.txt in this directory for details of the common GPIO
56*4882a593Smuzhiyunbindings used by client devices.
57*4882a593Smuzhiyun
58*4882a593SmuzhiyunExample: PCF8575 I/O expander node
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	pcf8575: gpio@20 {
61*4882a593Smuzhiyun		compatible = "nxp,pcf8575";
62*4882a593Smuzhiyun		reg = <0x20>;
63*4882a593Smuzhiyun		interrupt-parent = <&irqpin2>;
64*4882a593Smuzhiyun		interrupts = <3 0>;
65*4882a593Smuzhiyun		gpio-controller;
66*4882a593Smuzhiyun		#gpio-cells = <2>;
67*4882a593Smuzhiyun		interrupt-controller;
68*4882a593Smuzhiyun		#interrupt-cells = <2>;
69*4882a593Smuzhiyun	};
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