1*4882a593SmuzhiyunOMAP GPIO controller bindings 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: 5*4882a593Smuzhiyun - "ti,omap2-gpio" for OMAP2 controllers 6*4882a593Smuzhiyun - "ti,omap3-gpio" for OMAP3 controllers 7*4882a593Smuzhiyun - "ti,omap4-gpio" for OMAP4 controllers 8*4882a593Smuzhiyun- reg : Physical base address of the controller and length of memory mapped 9*4882a593Smuzhiyun region. 10*4882a593Smuzhiyun- gpio-controller : Marks the device node as a GPIO controller. 11*4882a593Smuzhiyun- #gpio-cells : Should be two. 12*4882a593Smuzhiyun - first cell is the pin number 13*4882a593Smuzhiyun - second cell is used to specify optional parameters (unused) 14*4882a593Smuzhiyun- interrupt-controller: Mark the device node as an interrupt controller. 15*4882a593Smuzhiyun- #interrupt-cells : Should be 2. 16*4882a593Smuzhiyun The first cell is the GPIO number. 17*4882a593Smuzhiyun The second cell is used to specify flags: 18*4882a593Smuzhiyun bits[3:0] trigger type and level flags: 19*4882a593Smuzhiyun 1 = low-to-high edge triggered. 20*4882a593Smuzhiyun 2 = high-to-low edge triggered. 21*4882a593Smuzhiyun 4 = active high level-sensitive. 22*4882a593Smuzhiyun 8 = active low level-sensitive. 23*4882a593Smuzhiyun- interrupts : The interrupt the controller is rising as output when an 24*4882a593Smuzhiyun interrupt occures 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunOMAP specific properties: 27*4882a593Smuzhiyun- ti,hwmods: Name of the hwmod associated to the GPIO: 28*4882a593Smuzhiyun "gpio<X>", <X> being the 1-based instance number 29*4882a593Smuzhiyun from the HW spec. 30*4882a593Smuzhiyun- ti,gpio-always-on: Indicates if a GPIO bank is always powered and 31*4882a593Smuzhiyun so will never lose its logic state. 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunExample: 35*4882a593Smuzhiyun 36*4882a593Smuzhiyungpio0: gpio@44e07000 { 37*4882a593Smuzhiyun compatible = "ti,omap4-gpio"; 38*4882a593Smuzhiyun reg = <0x44e07000 0x1000>; 39*4882a593Smuzhiyun ti,hwmods = "gpio1"; 40*4882a593Smuzhiyun gpio-controller; 41*4882a593Smuzhiyun #gpio-cells = <2>; 42*4882a593Smuzhiyun interrupt-controller; 43*4882a593Smuzhiyun #interrupt-cells = <2>; 44*4882a593Smuzhiyun interrupts = <96>; 45*4882a593Smuzhiyun}; 46