xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpio/gpio-altera.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunAltera GPIO controller bindings
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun- compatible:
5*4882a593Smuzhiyun  - "altr,pio-1.0"
6*4882a593Smuzhiyun- reg: Physical base address and length of the controller's registers.
7*4882a593Smuzhiyun- #gpio-cells : Should be 2
8*4882a593Smuzhiyun  - The first cell is the gpio offset number.
9*4882a593Smuzhiyun  - The second cell is reserved and is currently unused.
10*4882a593Smuzhiyun- gpio-controller : Marks the device node as a GPIO controller.
11*4882a593Smuzhiyun- interrupt-controller: Mark the device node as an interrupt controller
12*4882a593Smuzhiyun- #interrupt-cells : Should be 2. The interrupt type is fixed in the hardware.
13*4882a593Smuzhiyun  - The first cell is the GPIO offset number within the GPIO controller.
14*4882a593Smuzhiyun  - The second cell is the interrupt trigger type and level flags.
15*4882a593Smuzhiyun- interrupts: Specify the interrupt.
16*4882a593Smuzhiyun- altr,interrupt-type: Specifies the interrupt trigger type the GPIO
17*4882a593Smuzhiyun  hardware is synthesized. This field is required if the Altera GPIO controller
18*4882a593Smuzhiyun  used has IRQ enabled as the interrupt type is not software controlled,
19*4882a593Smuzhiyun  but hardware synthesized. Required if GPIO is used as an interrupt
20*4882a593Smuzhiyun  controller. The value is defined in <dt-bindings/interrupt-controller/irq.h>
21*4882a593Smuzhiyun  Only the following flags are supported:
22*4882a593Smuzhiyun    IRQ_TYPE_EDGE_RISING
23*4882a593Smuzhiyun    IRQ_TYPE_EDGE_FALLING
24*4882a593Smuzhiyun    IRQ_TYPE_EDGE_BOTH
25*4882a593Smuzhiyun    IRQ_TYPE_LEVEL_HIGH
26*4882a593Smuzhiyun
27*4882a593SmuzhiyunOptional properties:
28*4882a593Smuzhiyun- altr,ngpio: Width of the GPIO bank. This defines how many pins the
29*4882a593Smuzhiyun  GPIO device has. Ranges between 1-32. Optional and defaults to 32 if not
30*4882a593Smuzhiyun  specified.
31*4882a593Smuzhiyun
32*4882a593SmuzhiyunExample:
33*4882a593Smuzhiyun
34*4882a593Smuzhiyungpio_altr: gpio@ff200000 {
35*4882a593Smuzhiyun	compatible = "altr,pio-1.0";
36*4882a593Smuzhiyun	reg = <0xff200000 0x10>;
37*4882a593Smuzhiyun	interrupts = <0 45 4>;
38*4882a593Smuzhiyun	altr,ngpio = <32>;
39*4882a593Smuzhiyun	altr,interrupt-type = <IRQ_TYPE_EDGE_RISING>;
40*4882a593Smuzhiyun	#gpio-cells = <2>;
41*4882a593Smuzhiyun	gpio-controller;
42*4882a593Smuzhiyun	#interrupt-cells = <2>;
43*4882a593Smuzhiyun	interrupt-controller;
44*4882a593Smuzhiyun};
45