1*4882a593SmuzhiyunCadence GPIO controller bindings 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: should be "cdns,gpio-r1p02". 5*4882a593Smuzhiyun- reg: the register base address and size. 6*4882a593Smuzhiyun- #gpio-cells: should be 2. 7*4882a593Smuzhiyun * first cell is the GPIO number. 8*4882a593Smuzhiyun * second cell specifies the GPIO flags, as defined in 9*4882a593Smuzhiyun <dt-bindings/gpio/gpio.h>. Only the GPIO_ACTIVE_HIGH 10*4882a593Smuzhiyun and GPIO_ACTIVE_LOW flags are supported. 11*4882a593Smuzhiyun- gpio-controller: marks the device as a GPIO controller. 12*4882a593Smuzhiyun- clocks: should contain one entry referencing the peripheral clock driving 13*4882a593Smuzhiyun the GPIO controller. 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunOptional properties: 16*4882a593Smuzhiyun- ngpios: integer number of gpio lines supported by this controller, up to 32. 17*4882a593Smuzhiyun- interrupts: interrupt specifier for the controllers interrupt. 18*4882a593Smuzhiyun- interrupt-controller: marks the device as an interrupt controller. When 19*4882a593Smuzhiyun defined, interrupts, interrupt-parent and #interrupt-cells 20*4882a593Smuzhiyun are required. 21*4882a593Smuzhiyun- interrupt-cells: should be 2. 22*4882a593Smuzhiyun * first cell is the GPIO number you want to use as an IRQ source. 23*4882a593Smuzhiyun * second cell specifies the IRQ type, as defined in 24*4882a593Smuzhiyun <dt-bindings/interrupt-controller/irq.h>. 25*4882a593Smuzhiyun Currently only level sensitive IRQs are supported. 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunExample: 29*4882a593Smuzhiyun gpio0: gpio-controller@fd060000 { 30*4882a593Smuzhiyun compatible = "cdns,gpio-r1p02"; 31*4882a593Smuzhiyun reg =<0xfd060000 0x1000>; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun clocks = <&gpio_clk>; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun interrupt-parent = <&gic>; 36*4882a593Smuzhiyun interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun gpio-controller; 39*4882a593Smuzhiyun #gpio-cells = <2>; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun interrupt-controller; 42*4882a593Smuzhiyun #interrupt-cells = <2>; 43*4882a593Smuzhiyun }; 44