1*4882a593Smuzhiyun* General Purpose Input Output (GPIO) bus. 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunProperties: 4*4882a593Smuzhiyun- compatible: "cavium,octeon-3860-gpio" 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun- reg: The base address of the GPIO unit's register bank. 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun- gpio-controller: This is a GPIO controller. 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun- #gpio-cells: Must be <2>. The first cell is the GPIO pin. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun- interrupt-controller: The GPIO controller is also an interrupt 15*4882a593Smuzhiyun controller, many of its pins may be configured as an interrupt 16*4882a593Smuzhiyun source. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- #interrupt-cells: Must be <2>. The first cell is the GPIO pin 19*4882a593Smuzhiyun connected to the interrupt source. The second cell is the interrupt 20*4882a593Smuzhiyun triggering protocol and may have one of four values: 21*4882a593Smuzhiyun 1 - edge triggered on the rising edge. 22*4882a593Smuzhiyun 2 - edge triggered on the falling edge 23*4882a593Smuzhiyun 4 - level triggered active high. 24*4882a593Smuzhiyun 8 - level triggered active low. 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun- interrupts: Interrupt routing for each pin. 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunExample: 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun gpio-controller@1070000000800 { 31*4882a593Smuzhiyun #gpio-cells = <2>; 32*4882a593Smuzhiyun compatible = "cavium,octeon-3860-gpio"; 33*4882a593Smuzhiyun reg = <0x10700 0x00000800 0x0 0x100>; 34*4882a593Smuzhiyun gpio-controller; 35*4882a593Smuzhiyun /* Interrupts are specified by two parts: 36*4882a593Smuzhiyun * 1) GPIO pin number (0..15) 37*4882a593Smuzhiyun * 2) Triggering (1 - edge rising 38*4882a593Smuzhiyun * 2 - edge falling 39*4882a593Smuzhiyun * 4 - level active high 40*4882a593Smuzhiyun * 8 - level active low) 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun interrupt-controller; 43*4882a593Smuzhiyun #interrupt-cells = <2>; 44*4882a593Smuzhiyun /* The GPIO pin connect to 16 consecutive CUI bits */ 45*4882a593Smuzhiyun interrupts = <0 16>, <0 17>, <0 18>, <0 19>, 46*4882a593Smuzhiyun <0 20>, <0 21>, <0 22>, <0 23>, 47*4882a593Smuzhiyun <0 24>, <0 25>, <0 26>, <0 27>, 48*4882a593Smuzhiyun <0 28>, <0 29>, <0 30>, <0 31>; 49*4882a593Smuzhiyun }; 50