1*4882a593SmuzhiyunBroadcom Kona Family GPIO 2*4882a593Smuzhiyun========================= 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThis GPIO driver is used in the following Broadcom SoCs: 5*4882a593Smuzhiyun BCM11130, BCM11140, BCM11351, BCM28145, BCM28155 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunThe Broadcom GPIO Controller IP can be configured prior to synthesis to 8*4882a593Smuzhiyunsupport up to 8 banks of 32 GPIOs where each bank has its own IRQ. The 9*4882a593SmuzhiyunGPIO controller only supports edge, not level, triggering of interrupts. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunRequired properties 12*4882a593Smuzhiyun------------------- 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun- compatible: "brcm,bcm11351-gpio", "brcm,kona-gpio" 15*4882a593Smuzhiyun- reg: Physical base address and length of the controller's registers. 16*4882a593Smuzhiyun- interrupts: The interrupt outputs from the controller. There is one GPIO 17*4882a593Smuzhiyun interrupt per GPIO bank. The number of interrupts listed depends on the 18*4882a593Smuzhiyun number of GPIO banks on the SoC. The interrupts must be ordered by bank, 19*4882a593Smuzhiyun starting with bank 0. There is always a 1:1 mapping between banks and 20*4882a593Smuzhiyun IRQs. 21*4882a593Smuzhiyun- #gpio-cells: Should be <2>. The first cell is the pin number, the second 22*4882a593Smuzhiyun cell is used to specify optional parameters: 23*4882a593Smuzhiyun - bit 0 specifies polarity (0 for normal, 1 for inverted) 24*4882a593Smuzhiyun See also "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt. 25*4882a593Smuzhiyun- #interrupt-cells: Should be <2>. The first cell is the GPIO number. The 26*4882a593Smuzhiyun second cell is used to specify flags. The following subset of flags is 27*4882a593Smuzhiyun supported: 28*4882a593Smuzhiyun - trigger type (bits[1:0]): 29*4882a593Smuzhiyun 1 = low-to-high edge triggered. 30*4882a593Smuzhiyun 2 = high-to-low edge triggered. 31*4882a593Smuzhiyun 3 = low-to-high or high-to-low edge triggered 32*4882a593Smuzhiyun Valid values are 1, 2, 3 33*4882a593Smuzhiyun See also .../devicetree/bindings/interrupt-controller/interrupts.txt. 34*4882a593Smuzhiyun- gpio-controller: Marks the device node as a GPIO controller. 35*4882a593Smuzhiyun- interrupt-controller: Marks the device node as an interrupt controller. 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunExample: 38*4882a593Smuzhiyun gpio: gpio@35003000 { 39*4882a593Smuzhiyun compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio"; 40*4882a593Smuzhiyun reg = <0x35003000 0x800>; 41*4882a593Smuzhiyun interrupts = 42*4882a593Smuzhiyun <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 43*4882a593Smuzhiyun GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 44*4882a593Smuzhiyun GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 45*4882a593Smuzhiyun GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 46*4882a593Smuzhiyun GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 47*4882a593Smuzhiyun GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 48*4882a593Smuzhiyun #gpio-cells = <2>; 49*4882a593Smuzhiyun #interrupt-cells = <2>; 50*4882a593Smuzhiyun gpio-controller; 51*4882a593Smuzhiyun interrupt-controller; 52*4882a593Smuzhiyun }; 53