1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/gpio/brcm,xgs-iproc-gpio.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Broadcom XGS iProc GPIO controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Chris Packham <chris.packham@alliedtelesis.co.nz> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun This controller is the Chip Common A GPIO present on a number of Broadcom 14*4882a593Smuzhiyun switch ASICs with integrated SoCs. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun const: brcm,iproc-gpio-cca 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun reg: 21*4882a593Smuzhiyun items: 22*4882a593Smuzhiyun - description: the I/O address containing the GPIO controller registers. 23*4882a593Smuzhiyun - description: the I/O address containing the Chip Common A interrupt registers. 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun gpio-controller: true 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun '#gpio-cells': 28*4882a593Smuzhiyun const: 2 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun ngpios: 31*4882a593Smuzhiyun minimum: 0 32*4882a593Smuzhiyun maximum: 32 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun interrupt-controller: true 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun '#interrupt-cells': 37*4882a593Smuzhiyun const: 2 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun interrupts: 40*4882a593Smuzhiyun maxItems: 1 41*4882a593Smuzhiyun 42*4882a593Smuzhiyunrequired: 43*4882a593Smuzhiyun - compatible 44*4882a593Smuzhiyun - reg 45*4882a593Smuzhiyun - "#gpio-cells" 46*4882a593Smuzhiyun - gpio-controller 47*4882a593Smuzhiyun 48*4882a593SmuzhiyunadditionalProperties: false 49*4882a593Smuzhiyun 50*4882a593Smuzhiyundependencies: 51*4882a593Smuzhiyun interrupt-controller: [ interrupts ] 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunexamples: 54*4882a593Smuzhiyun - | 55*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/irq.h> 56*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 57*4882a593Smuzhiyun gpio@18000060 { 58*4882a593Smuzhiyun compatible = "brcm,iproc-gpio-cca"; 59*4882a593Smuzhiyun #gpio-cells = <2>; 60*4882a593Smuzhiyun reg = <0x18000060 0x50>, 61*4882a593Smuzhiyun <0x18000000 0x50>; 62*4882a593Smuzhiyun ngpios = <12>; 63*4882a593Smuzhiyun gpio-controller; 64*4882a593Smuzhiyun interrupt-controller; 65*4882a593Smuzhiyun #interrupt-cells = <2>; 66*4882a593Smuzhiyun interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun... 71