1*4882a593SmuzhiyunBindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers. 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThese bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 4*4882a593Smuzhiyunare the only ones which don't need a pinctrl driver. 5*4882a593SmuzhiyunBCM6338 have 8-bit data and dirout registers, where GPIO state can be read 6*4882a593Smuzhiyunand/or written, and the direction changed from input to output. 7*4882a593SmuzhiyunBCM6345 have 16-bit data and dirout registers, where GPIO state can be read 8*4882a593Smuzhiyunand/or written, and the direction changed from input to output. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunRequired properties: 11*4882a593Smuzhiyun - compatible: should be "brcm,bcm6345-gpio" 12*4882a593Smuzhiyun - reg-names: must contain 13*4882a593Smuzhiyun "dat" - data register 14*4882a593Smuzhiyun "dirout" - direction (output) register 15*4882a593Smuzhiyun - reg: address + size pairs describing the GPIO register sets; 16*4882a593Smuzhiyun order must correspond with the order of entries in reg-names 17*4882a593Smuzhiyun - #gpio-cells: must be set to 2. The first cell is the pin number and 18*4882a593Smuzhiyun the second cell is used to specify the gpio polarity: 19*4882a593Smuzhiyun 0 = active high 20*4882a593Smuzhiyun 1 = active low 21*4882a593Smuzhiyun - gpio-controller: Marks the device node as a gpio controller. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunOptional properties: 24*4882a593Smuzhiyun - native-endian: use native endian memory. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunExamples: 27*4882a593Smuzhiyun - BCM6338: 28*4882a593Smuzhiyun gpio: gpio-controller@fffe0407 { 29*4882a593Smuzhiyun compatible = "brcm,bcm6345-gpio"; 30*4882a593Smuzhiyun reg-names = "dirout", "dat"; 31*4882a593Smuzhiyun reg = <0xfffe0407 1>, <0xfffe040f 1>; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #gpio-cells = <2>; 34*4882a593Smuzhiyun gpio-controller; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun - BCM6345: 38*4882a593Smuzhiyun gpio: gpio-controller@fffe0406 { 39*4882a593Smuzhiyun compatible = "brcm,bcm6345-gpio"; 40*4882a593Smuzhiyun reg-names = "dirout", "dat"; 41*4882a593Smuzhiyun reg = <0xfffe0406 2>, <0xfffe040a 2>; 42*4882a593Smuzhiyun native-endian; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #gpio-cells = <2>; 45*4882a593Smuzhiyun gpio-controller; 46*4882a593Smuzhiyun }; 47