1*4882a593SmuzhiyunIntel Service Layer Driver for Stratix10 SoC 2*4882a593Smuzhiyun============================================ 3*4882a593SmuzhiyunIntel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard 4*4882a593Smuzhiyunprocessor system (HPS) and Secure Device Manager (SDM). When the FPGA is 5*4882a593Smuzhiyunconfigured from HPS, there needs to be a way for HPS to notify SDM the 6*4882a593Smuzhiyunlocation and size of the configuration data. Then SDM will get the 7*4882a593Smuzhiyunconfiguration data from that location and perform the FPGA configuration. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunTo meet the whole system security needs and support virtual machine requesting 10*4882a593Smuzhiyuncommunication with SDM, only the secure world of software (EL3, Exception 11*4882a593SmuzhiyunLayer 3) can interface with SDM. All software entities running on other 12*4882a593Smuzhiyunexception layers must channel through the EL3 software whenever it needs 13*4882a593Smuzhiyunservice from SDM. 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunIntel Stratix10 service layer driver, running at privileged exception level 16*4882a593Smuzhiyun(EL1, Exception Layer 1), interfaces with the service providers and provides 17*4882a593Smuzhiyunthe services for FPGA configuration, QSPI, Crypto and warm reset. Service layer 18*4882a593Smuzhiyundriver also manages secure monitor call (SMC) to communicate with secure monitor 19*4882a593Smuzhiyuncode running in EL3. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunRequired properties: 22*4882a593Smuzhiyun------------------- 23*4882a593SmuzhiyunThe svc node has the following mandatory properties, must be located under 24*4882a593Smuzhiyunthe firmware node. 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun- compatible: "intel,stratix10-svc" or "intel,agilex-svc" 27*4882a593Smuzhiyun- method: smc or hvc 28*4882a593Smuzhiyun smc - Secure Monitor Call 29*4882a593Smuzhiyun hvc - Hypervisor Call 30*4882a593Smuzhiyun- memory-region: 31*4882a593Smuzhiyun phandle to the reserved memory node. See 32*4882a593Smuzhiyun Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt 33*4882a593Smuzhiyun for details 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunExample: 36*4882a593Smuzhiyun------- 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun reserved-memory { 39*4882a593Smuzhiyun #address-cells = <2>; 40*4882a593Smuzhiyun #size-cells = <2>; 41*4882a593Smuzhiyun ranges; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun service_reserved: svcbuffer@0 { 44*4882a593Smuzhiyun compatible = "shared-dma-pool"; 45*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x1000000>; 46*4882a593Smuzhiyun alignment = <0x1000>; 47*4882a593Smuzhiyun no-map; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun firmware { 52*4882a593Smuzhiyun svc { 53*4882a593Smuzhiyun compatible = "intel,stratix10-svc"; 54*4882a593Smuzhiyun method = "smc"; 55*4882a593Smuzhiyun memory-region = <&service_reserved>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58