1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/dma/renesas,usb-dmac.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Renesas USB DMA Controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunallOf: 13*4882a593Smuzhiyun - $ref: "dma-controller.yaml#" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun items: 18*4882a593Smuzhiyun - enum: 19*4882a593Smuzhiyun - renesas,r8a7742-usb-dmac # RZ/G1H 20*4882a593Smuzhiyun - renesas,r8a7743-usb-dmac # RZ/G1M 21*4882a593Smuzhiyun - renesas,r8a7744-usb-dmac # RZ/G1N 22*4882a593Smuzhiyun - renesas,r8a7745-usb-dmac # RZ/G1E 23*4882a593Smuzhiyun - renesas,r8a77470-usb-dmac # RZ/G1C 24*4882a593Smuzhiyun - renesas,r8a774a1-usb-dmac # RZ/G2M 25*4882a593Smuzhiyun - renesas,r8a774b1-usb-dmac # RZ/G2N 26*4882a593Smuzhiyun - renesas,r8a774c0-usb-dmac # RZ/G2E 27*4882a593Smuzhiyun - renesas,r8a774e1-usb-dmac # RZ/G2H 28*4882a593Smuzhiyun - renesas,r8a7790-usb-dmac # R-Car H2 29*4882a593Smuzhiyun - renesas,r8a7791-usb-dmac # R-Car M2-W 30*4882a593Smuzhiyun - renesas,r8a7793-usb-dmac # R-Car M2-N 31*4882a593Smuzhiyun - renesas,r8a7794-usb-dmac # R-Car E2 32*4882a593Smuzhiyun - renesas,r8a7795-usb-dmac # R-Car H3 33*4882a593Smuzhiyun - renesas,r8a7796-usb-dmac # R-Car M3-W 34*4882a593Smuzhiyun - renesas,r8a77961-usb-dmac # R-Car M3-W+ 35*4882a593Smuzhiyun - renesas,r8a77965-usb-dmac # R-Car M3-N 36*4882a593Smuzhiyun - renesas,r8a77990-usb-dmac # R-Car E3 37*4882a593Smuzhiyun - renesas,r8a77995-usb-dmac # R-Car D3 38*4882a593Smuzhiyun - const: renesas,usb-dmac 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun reg: 41*4882a593Smuzhiyun maxItems: 1 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun interrupts: 44*4882a593Smuzhiyun minItems: 2 45*4882a593Smuzhiyun maxItems: 2 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun interrupt-names: 48*4882a593Smuzhiyun items: 49*4882a593Smuzhiyun - pattern: ch0 50*4882a593Smuzhiyun - pattern: ch1 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun clocks: 53*4882a593Smuzhiyun maxItems: 1 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun '#dma-cells': 56*4882a593Smuzhiyun const: 1 57*4882a593Smuzhiyun description: 58*4882a593Smuzhiyun The cell specifies the channel number of the DMAC port connected to 59*4882a593Smuzhiyun the DMA client. 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun dma-channels: 62*4882a593Smuzhiyun const: 2 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun iommus: 65*4882a593Smuzhiyun minItems: 2 66*4882a593Smuzhiyun maxItems: 2 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun power-domains: 69*4882a593Smuzhiyun maxItems: 1 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun resets: 72*4882a593Smuzhiyun maxItems: 1 73*4882a593Smuzhiyun 74*4882a593Smuzhiyunrequired: 75*4882a593Smuzhiyun - compatible 76*4882a593Smuzhiyun - reg 77*4882a593Smuzhiyun - interrupts 78*4882a593Smuzhiyun - interrupt-names 79*4882a593Smuzhiyun - clocks 80*4882a593Smuzhiyun - '#dma-cells' 81*4882a593Smuzhiyun - dma-channels 82*4882a593Smuzhiyun - power-domains 83*4882a593Smuzhiyun - resets 84*4882a593Smuzhiyun 85*4882a593SmuzhiyunadditionalProperties: false 86*4882a593Smuzhiyun 87*4882a593Smuzhiyunexamples: 88*4882a593Smuzhiyun - | 89*4882a593Smuzhiyun #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 90*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 91*4882a593Smuzhiyun #include <dt-bindings/power/r8a7790-sysc.h> 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun usb_dmac0: dma-controller@e65a0000 { 94*4882a593Smuzhiyun compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; 95*4882a593Smuzhiyun reg = <0xe65a0000 0x100>; 96*4882a593Smuzhiyun interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 97*4882a593Smuzhiyun <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 98*4882a593Smuzhiyun interrupt-names = "ch0", "ch1"; 99*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 330>; 100*4882a593Smuzhiyun power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 101*4882a593Smuzhiyun resets = <&cpg 330>; 102*4882a593Smuzhiyun #dma-cells = <1>; 103*4882a593Smuzhiyun dma-channels = <2>; 104*4882a593Smuzhiyun }; 105