1*4882a593Smuzhiyun* SHDMA Device Tree bindings 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunSh-/r-mobile and R-Car systems often have multiple identical DMA controller 4*4882a593Smuzhiyuninstances, capable of serving any of a common set of DMA slave devices, using 5*4882a593Smuzhiyunthe same configuration. To describe this topology we require all compatible 6*4882a593SmuzhiyunSHDMA DT nodes to be placed under a DMA multiplexer node. All such compatible 7*4882a593SmuzhiyunDMAC instances have the same number of channels and use the same DMA 8*4882a593Smuzhiyundescriptors. Therefore respective DMA DT bindings can also all be placed in the 9*4882a593Smuzhiyunmultiplexer node. Even if there is only one such DMAC instance on a system, it 10*4882a593Smuzhiyunstill has to be placed under such a multiplexer node. 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun* DMA multiplexer 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunRequired properties: 15*4882a593Smuzhiyun- compatible: should be "renesas,shdma-mux" 16*4882a593Smuzhiyun- #dma-cells: should be <1>, see "dmas" property below 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunOptional properties (currently unused): 19*4882a593Smuzhiyun- dma-channels: number of DMA channels 20*4882a593Smuzhiyun- dma-requests: number of DMA request signals 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun* DMA controller 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunRequired properties: 25*4882a593Smuzhiyun- compatible: should be of the form "renesas,shdma-<soc>", where <soc> should 26*4882a593Smuzhiyun be replaced with the desired SoC model, e.g. 27*4882a593Smuzhiyun "renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunExample: 30*4882a593Smuzhiyun dmac: dma-multiplexer@0 { 31*4882a593Smuzhiyun compatible = "renesas,shdma-mux"; 32*4882a593Smuzhiyun #dma-cells = <1>; 33*4882a593Smuzhiyun dma-channels = <20>; 34*4882a593Smuzhiyun dma-requests = <256>; 35*4882a593Smuzhiyun #address-cells = <2>; 36*4882a593Smuzhiyun #size-cells = <2>; 37*4882a593Smuzhiyun ranges; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun dma0: dma-controller@e6700020 { 40*4882a593Smuzhiyun compatible = "renesas,shdma-r8a73a4"; 41*4882a593Smuzhiyun reg = <0 0xe6700020 0 0x89e0>; 42*4882a593Smuzhiyun interrupt-parent = <&gic>; 43*4882a593Smuzhiyun interrupts = <0 220 4 44*4882a593Smuzhiyun 0 200 4 45*4882a593Smuzhiyun 0 201 4 46*4882a593Smuzhiyun 0 202 4 47*4882a593Smuzhiyun 0 203 4 48*4882a593Smuzhiyun 0 204 4 49*4882a593Smuzhiyun 0 205 4 50*4882a593Smuzhiyun 0 206 4 51*4882a593Smuzhiyun 0 207 4 52*4882a593Smuzhiyun 0 208 4 53*4882a593Smuzhiyun 0 209 4 54*4882a593Smuzhiyun 0 210 4 55*4882a593Smuzhiyun 0 211 4 56*4882a593Smuzhiyun 0 212 4 57*4882a593Smuzhiyun 0 213 4 58*4882a593Smuzhiyun 0 214 4 59*4882a593Smuzhiyun 0 215 4 60*4882a593Smuzhiyun 0 216 4 61*4882a593Smuzhiyun 0 217 4 62*4882a593Smuzhiyun 0 218 4 63*4882a593Smuzhiyun 0 219 4>; 64*4882a593Smuzhiyun interrupt-names = "error", 65*4882a593Smuzhiyun "ch0", "ch1", "ch2", "ch3", 66*4882a593Smuzhiyun "ch4", "ch5", "ch6", "ch7", 67*4882a593Smuzhiyun "ch8", "ch9", "ch10", "ch11", 68*4882a593Smuzhiyun "ch12", "ch13", "ch14", "ch15", 69*4882a593Smuzhiyun "ch16", "ch17", "ch18", "ch19"; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun* DMA client 74*4882a593Smuzhiyun 75*4882a593SmuzhiyunRequired properties: 76*4882a593Smuzhiyun- dmas: a list of <[DMA multiplexer phandle] [MID/RID value]> pairs, 77*4882a593Smuzhiyun where MID/RID values are fixed handles, specified in the SoC 78*4882a593Smuzhiyun manual 79*4882a593Smuzhiyun- dma-names: a list of DMA channel names, one per "dmas" entry 80*4882a593Smuzhiyun 81*4882a593SmuzhiyunExample: 82*4882a593Smuzhiyun dmas = <&dmac 0xd1 83*4882a593Smuzhiyun &dmac 0xd2>; 84*4882a593Smuzhiyun dma-names = "tx", "rx"; 85