1*4882a593Smuzhiyun* ARM PrimeCell PL330 DMA Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe ARM PrimeCell PL330 DMA controller can move blocks of memory contents 4*4882a593Smuzhiyunbetween memory and peripherals or memory to memory. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun - compatible: should include both "arm,pl330" and "arm,primecell". 8*4882a593Smuzhiyun - reg: physical base address of the controller and length of memory mapped 9*4882a593Smuzhiyun region. 10*4882a593Smuzhiyun - interrupts: interrupt number to the cpu. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunOptional properties: 13*4882a593Smuzhiyun - dma-coherent : Present if dma operations are coherent 14*4882a593Smuzhiyun - #dma-cells: must be <1>. used to represent the number of integer 15*4882a593Smuzhiyun cells in the dmas property of client device. 16*4882a593Smuzhiyun - dma-channels: contains the total number of DMA channels supported by the DMAC 17*4882a593Smuzhiyun - dma-requests: contains the total number of DMA requests supported by the DMAC 18*4882a593Smuzhiyun - arm,pl330-broken-no-flushp: quirk for avoiding to execute DMAFLUSHP 19*4882a593Smuzhiyun - arm,pl330-periph-burst: quirk for performing burst transfer only 20*4882a593Smuzhiyun - resets: contains an entry for each entry in reset-names. 21*4882a593Smuzhiyun See ../reset/reset.txt for details. 22*4882a593Smuzhiyun - reset-names: must contain at least "dma", and optional is "dma-ocp". 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunExample: 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun pdma0: pdma@12680000 { 27*4882a593Smuzhiyun compatible = "arm,pl330", "arm,primecell"; 28*4882a593Smuzhiyun reg = <0x12680000 0x1000>; 29*4882a593Smuzhiyun interrupts = <99>; 30*4882a593Smuzhiyun #dma-cells = <1>; 31*4882a593Smuzhiyun #dma-channels = <8>; 32*4882a593Smuzhiyun #dma-requests = <32>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunClient drivers (device nodes requiring dma transfers from dev-to-mem or 36*4882a593Smuzhiyunmem-to-dev) should specify the DMA channel numbers and dma channel names 37*4882a593Smuzhiyunas shown below. 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun [property name] = <[phandle of the dma controller] [dma request id]>; 40*4882a593Smuzhiyun [property name] = <[dma channel name]> 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun where 'dma request id' is the dma request number which is connected 43*4882a593Smuzhiyun to the client controller. The 'property name' 'dmas' and 'dma-names' 44*4882a593Smuzhiyun as required by the generic dma device tree binding helpers. The dma 45*4882a593Smuzhiyun names correspond 1:1 with the dma request ids in the dmas property. 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun Example: dmas = <&pdma0 12 48*4882a593Smuzhiyun &pdma1 11>; 49*4882a593Smuzhiyun dma-names = "tx", "rx"; 50