1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/dma/allwinner,sun4i-a10-dma.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Allwinner A10 DMA Controller Device Tree Bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Chen-Yu Tsai <wens@csie.org> 11*4882a593Smuzhiyun - Maxime Ripard <mripard@kernel.org> 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunallOf: 14*4882a593Smuzhiyun - $ref: "dma-controller.yaml#" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun "#dma-cells": 18*4882a593Smuzhiyun const: 2 19*4882a593Smuzhiyun description: 20*4882a593Smuzhiyun The first cell is either 0 or 1, the former to use the normal 21*4882a593Smuzhiyun DMA, 1 for dedicated DMA. The second cell is the request line 22*4882a593Smuzhiyun number. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun compatible: 25*4882a593Smuzhiyun const: allwinner,sun4i-a10-dma 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun reg: 28*4882a593Smuzhiyun maxItems: 1 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun interrupts: 31*4882a593Smuzhiyun maxItems: 1 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun clocks: 34*4882a593Smuzhiyun maxItems: 1 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunrequired: 37*4882a593Smuzhiyun - "#dma-cells" 38*4882a593Smuzhiyun - compatible 39*4882a593Smuzhiyun - reg 40*4882a593Smuzhiyun - interrupts 41*4882a593Smuzhiyun - clocks 42*4882a593Smuzhiyun 43*4882a593SmuzhiyunadditionalProperties: false 44*4882a593Smuzhiyun 45*4882a593Smuzhiyunexamples: 46*4882a593Smuzhiyun - | 47*4882a593Smuzhiyun dma: dma-controller@1c02000 { 48*4882a593Smuzhiyun compatible = "allwinner,sun4i-a10-dma"; 49*4882a593Smuzhiyun reg = <0x01c02000 0x1000>; 50*4882a593Smuzhiyun interrupts = <27>; 51*4882a593Smuzhiyun clocks = <&ahb_gates 6>; 52*4882a593Smuzhiyun #dma-cells = <2>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun... 56