xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/dma/allwinner,sun50i-a64-dma.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Allwinner A64 DMA Controller Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Chen-Yu Tsai <wens@csie.org>
11*4882a593Smuzhiyun  - Maxime Ripard <mripard@kernel.org>
12*4882a593Smuzhiyun
13*4882a593SmuzhiyunallOf:
14*4882a593Smuzhiyun  - $ref: "dma-controller.yaml#"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyunproperties:
17*4882a593Smuzhiyun  "#dma-cells":
18*4882a593Smuzhiyun    const: 1
19*4882a593Smuzhiyun    description: The cell is the request line number.
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun  compatible:
22*4882a593Smuzhiyun    oneOf:
23*4882a593Smuzhiyun      - const: allwinner,sun50i-a64-dma
24*4882a593Smuzhiyun      - const: allwinner,sun50i-h6-dma
25*4882a593Smuzhiyun      - items:
26*4882a593Smuzhiyun          - const: allwinner,sun8i-r40-dma
27*4882a593Smuzhiyun          - const: allwinner,sun50i-a64-dma
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun  reg:
30*4882a593Smuzhiyun    maxItems: 1
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  interrupts:
33*4882a593Smuzhiyun    maxItems: 1
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun  clocks:
36*4882a593Smuzhiyun    minItems: 1
37*4882a593Smuzhiyun    maxItems: 2
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun  clock-names:
40*4882a593Smuzhiyun    items:
41*4882a593Smuzhiyun      - const: bus
42*4882a593Smuzhiyun      - const: mbus
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun  resets:
45*4882a593Smuzhiyun    maxItems: 1
46*4882a593Smuzhiyun
47*4882a593Smuzhiyunrequired:
48*4882a593Smuzhiyun  - "#dma-cells"
49*4882a593Smuzhiyun  - compatible
50*4882a593Smuzhiyun  - reg
51*4882a593Smuzhiyun  - interrupts
52*4882a593Smuzhiyun  - clocks
53*4882a593Smuzhiyun  - resets
54*4882a593Smuzhiyun  - dma-channels
55*4882a593Smuzhiyun
56*4882a593Smuzhiyunif:
57*4882a593Smuzhiyun  properties:
58*4882a593Smuzhiyun    compatible:
59*4882a593Smuzhiyun      const: allwinner,sun50i-h6-dma
60*4882a593Smuzhiyun
61*4882a593Smuzhiyunthen:
62*4882a593Smuzhiyun  properties:
63*4882a593Smuzhiyun    clocks:
64*4882a593Smuzhiyun      minItems: 2
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun  required:
67*4882a593Smuzhiyun    - clock-names
68*4882a593Smuzhiyun
69*4882a593Smuzhiyunelse:
70*4882a593Smuzhiyun  properties:
71*4882a593Smuzhiyun    clocks:
72*4882a593Smuzhiyun      maxItems: 1
73*4882a593Smuzhiyun
74*4882a593SmuzhiyununevaluatedProperties: false
75*4882a593Smuzhiyun
76*4882a593Smuzhiyunexamples:
77*4882a593Smuzhiyun  - |
78*4882a593Smuzhiyun    dma: dma-controller@1c02000 {
79*4882a593Smuzhiyun        compatible = "allwinner,sun50i-a64-dma";
80*4882a593Smuzhiyun        reg = <0x01c02000 0x1000>;
81*4882a593Smuzhiyun        interrupts = <0 50 4>;
82*4882a593Smuzhiyun        clocks = <&ccu 30>;
83*4882a593Smuzhiyun        dma-channels = <8>;
84*4882a593Smuzhiyun        dma-requests = <27>;
85*4882a593Smuzhiyun        resets = <&ccu 7>;
86*4882a593Smuzhiyun        #dma-cells = <1>;
87*4882a593Smuzhiyun    };
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun...
90