1*4882a593SmuzhiyunTruly model NT35597 DSI display driver 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Truly NT35597 is a generic display driver, currently only configured 4*4882a593Smuzhiyunfor use in the 2K display on the Qualcomm SDM845 MTP board. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun- compatible: should be "truly,nt35597-2K-display" 8*4882a593Smuzhiyun- vdda-supply: phandle of the regulator that provides the supply voltage 9*4882a593Smuzhiyun Power IC supply 10*4882a593Smuzhiyun- vdispp-supply: phandle of the regulator that provides the supply voltage 11*4882a593Smuzhiyun for positive LCD bias 12*4882a593Smuzhiyun- vdispn-supply: phandle of the regulator that provides the supply voltage 13*4882a593Smuzhiyun for negative LCD bias 14*4882a593Smuzhiyun- reset-gpios: phandle of gpio for reset line 15*4882a593Smuzhiyun This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names 16*4882a593Smuzhiyun (active low) 17*4882a593Smuzhiyun- mode-gpios: phandle of the gpio for choosing the mode of the display 18*4882a593Smuzhiyun for single DSI or Dual DSI 19*4882a593Smuzhiyun This should be low for dual DSI and high for single DSI mode 20*4882a593Smuzhiyun- ports: This device has two video ports driven by two DSIs. Their connections 21*4882a593Smuzhiyun are modeled using the OF graph bindings specified in 22*4882a593Smuzhiyun Documentation/devicetree/bindings/graph.txt. 23*4882a593Smuzhiyun - port@0: DSI input port driven by master DSI 24*4882a593Smuzhiyun - port@1: DSI input port driven by secondary DSI 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunExample: 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun dsi@ae94000 { 29*4882a593Smuzhiyun panel@0 { 30*4882a593Smuzhiyun compatible = "truly,nt35597-2K-display"; 31*4882a593Smuzhiyun reg = <0>; 32*4882a593Smuzhiyun vdda-supply = <&pm8998_l14>; 33*4882a593Smuzhiyun vdispp-supply = <&lab_regulator>; 34*4882a593Smuzhiyun vdispn-supply = <&ibb_regulator>; 35*4882a593Smuzhiyun pinctrl-names = "default", "suspend"; 36*4882a593Smuzhiyun pinctrl-0 = <&dpu_dsi_active>; 37*4882a593Smuzhiyun pinctrl-1 = <&dpu_dsi_suspend>; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; 40*4882a593Smuzhiyun mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; 41*4882a593Smuzhiyun ports { 42*4882a593Smuzhiyun #address-cells = <1>; 43*4882a593Smuzhiyun #size-cells = <0>; 44*4882a593Smuzhiyun port@0 { 45*4882a593Smuzhiyun reg = <0>; 46*4882a593Smuzhiyun panel0_in: endpoint { 47*4882a593Smuzhiyun remote-endpoint = <&dsi0_out>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun port@1 { 52*4882a593Smuzhiyun reg = <1>; 53*4882a593Smuzhiyun panel1_in: endpoint { 54*4882a593Smuzhiyun remote-endpoint = <&dsi1_out>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun }; 60