1*4882a593SmuzhiyunDevice-Tree bindings for tilcdc DRM generic panel output driver 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun - compatible: value should be "ti,tilcdc,panel". 5*4882a593Smuzhiyun - panel-info: configuration info to configure LCDC correctly for the panel 6*4882a593Smuzhiyun - ac-bias: AC Bias Pin Frequency 7*4882a593Smuzhiyun - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt 8*4882a593Smuzhiyun - dma-burst-sz: DMA burst size 9*4882a593Smuzhiyun - bpp: Bits per pixel 10*4882a593Smuzhiyun - fdd: FIFO DMA Request Delay 11*4882a593Smuzhiyun - sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling 12*4882a593Smuzhiyun - sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore 13*4882a593Smuzhiyun - raster-order: Raster Data Order Select: 1=Most-to-least 0=Least-to-most 14*4882a593Smuzhiyun - fifo-th: DMA FIFO threshold 15*4882a593Smuzhiyun - display-timings: typical videomode of lcd panel. Multiple video modes 16*4882a593Smuzhiyun can be listed if the panel supports multiple timings, but the 'native-mode' 17*4882a593Smuzhiyun should be the preferred/default resolution. Refer to 18*4882a593Smuzhiyun Documentation/devicetree/bindings/display/panel/display-timing.txt for display 19*4882a593Smuzhiyun timing binding details. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunOptional properties: 22*4882a593Smuzhiyun- backlight: phandle of the backlight device attached to the panel 23*4882a593Smuzhiyun- enable-gpios: GPIO pin to enable or disable the panel 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunRecommended properties: 26*4882a593Smuzhiyun - pinctrl-names, pinctrl-0: the pincontrol settings to configure 27*4882a593Smuzhiyun muxing properly for pins that connect to TFP410 device 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunExample: 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* Settings for CDTech_S035Q01 / LCD3 cape: */ 32*4882a593Smuzhiyun lcd3 { 33*4882a593Smuzhiyun compatible = "ti,tilcdc,panel"; 34*4882a593Smuzhiyun pinctrl-names = "default"; 35*4882a593Smuzhiyun pinctrl-0 = <&bone_lcd3_cape_lcd_pins>; 36*4882a593Smuzhiyun backlight = <&backlight>; 37*4882a593Smuzhiyun enable-gpios = <&gpio3 19 0>; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun panel-info { 40*4882a593Smuzhiyun ac-bias = <255>; 41*4882a593Smuzhiyun ac-bias-intrpt = <0>; 42*4882a593Smuzhiyun dma-burst-sz = <16>; 43*4882a593Smuzhiyun bpp = <16>; 44*4882a593Smuzhiyun fdd = <0x80>; 45*4882a593Smuzhiyun sync-edge = <0>; 46*4882a593Smuzhiyun sync-ctrl = <1>; 47*4882a593Smuzhiyun raster-order = <0>; 48*4882a593Smuzhiyun fifo-th = <0>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun display-timings { 51*4882a593Smuzhiyun native-mode = <&timing0>; 52*4882a593Smuzhiyun timing0: 320x240 { 53*4882a593Smuzhiyun hactive = <320>; 54*4882a593Smuzhiyun vactive = <240>; 55*4882a593Smuzhiyun hback-porch = <21>; 56*4882a593Smuzhiyun hfront-porch = <58>; 57*4882a593Smuzhiyun hsync-len = <47>; 58*4882a593Smuzhiyun vback-porch = <11>; 59*4882a593Smuzhiyun vfront-porch = <23>; 60*4882a593Smuzhiyun vsync-len = <2>; 61*4882a593Smuzhiyun clock-frequency = <8000000>; 62*4882a593Smuzhiyun hsync-active = <0>; 63*4882a593Smuzhiyun vsync-active = <0>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67