1*4882a593SmuzhiyunTexas Instruments OMAP3 Display Subsystem 2*4882a593Smuzhiyun========================================= 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunSee Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic 5*4882a593Smuzhiyundescription about OMAP Display Subsystem bindings. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunDSS Core 8*4882a593Smuzhiyun-------- 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunRequired properties: 11*4882a593Smuzhiyun- compatible: "ti,omap3-dss" 12*4882a593Smuzhiyun- reg: address and length of the register space 13*4882a593Smuzhiyun- ti,hwmods: "dss_core" 14*4882a593Smuzhiyun- clocks: handle to fclk 15*4882a593Smuzhiyun- clock-names: "fck" 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunOptional nodes: 18*4882a593Smuzhiyun- Video ports: 19*4882a593Smuzhiyun - Port 0: DPI output 20*4882a593Smuzhiyun - Port 1: SDI output 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunDPI Endpoint required properties: 23*4882a593Smuzhiyun- data-lines: number of lines used 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunSDI Endpoint required properties: 26*4882a593Smuzhiyun- datapairs: number of datapairs used 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunDISPC 30*4882a593Smuzhiyun----- 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunRequired properties: 33*4882a593Smuzhiyun- compatible: "ti,omap3-dispc" 34*4882a593Smuzhiyun- reg: address and length of the register space 35*4882a593Smuzhiyun- ti,hwmods: "dss_dispc" 36*4882a593Smuzhiyun- interrupts: the DISPC interrupt 37*4882a593Smuzhiyun- clocks: handle to fclk 38*4882a593Smuzhiyun- clock-names: "fck" 39*4882a593Smuzhiyun 40*4882a593SmuzhiyunOptional properties: 41*4882a593Smuzhiyun- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit 42*4882a593Smuzhiyun in bytes per second 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunRFBI 46*4882a593Smuzhiyun---- 47*4882a593Smuzhiyun 48*4882a593SmuzhiyunRequired properties: 49*4882a593Smuzhiyun- compatible: "ti,omap3-rfbi" 50*4882a593Smuzhiyun- reg: address and length of the register space 51*4882a593Smuzhiyun- ti,hwmods: "dss_rfbi" 52*4882a593Smuzhiyun- clocks: handles to fclk and iclk 53*4882a593Smuzhiyun- clock-names: "fck", "ick" 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun 56*4882a593SmuzhiyunVENC 57*4882a593Smuzhiyun---- 58*4882a593Smuzhiyun 59*4882a593SmuzhiyunRequired properties: 60*4882a593Smuzhiyun- compatible: "ti,omap3-venc" 61*4882a593Smuzhiyun- reg: address and length of the register space 62*4882a593Smuzhiyun- ti,hwmods: "dss_venc" 63*4882a593Smuzhiyun- vdda-supply: power supply for DAC 64*4882a593Smuzhiyun- clocks: handle to fclk 65*4882a593Smuzhiyun- clock-names: "fck" 66*4882a593Smuzhiyun 67*4882a593SmuzhiyunVENC Endpoint required properties: 68*4882a593Smuzhiyun- ti,invert-polarity: invert the polarity of the video signal 69*4882a593Smuzhiyun- ti,channels: 1 for composite, 2 for s-video 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun 72*4882a593SmuzhiyunDSI 73*4882a593Smuzhiyun--- 74*4882a593Smuzhiyun 75*4882a593SmuzhiyunRequired properties: 76*4882a593Smuzhiyun- compatible: "ti,omap3-dsi" 77*4882a593Smuzhiyun- reg: addresses and lengths of the register spaces for 'proto', 'phy' and 'pll' 78*4882a593Smuzhiyun- reg-names: "proto", "phy", "pll" 79*4882a593Smuzhiyun- interrupts: the DSI interrupt line 80*4882a593Smuzhiyun- ti,hwmods: "dss_dsi1" 81*4882a593Smuzhiyun- vdd-supply: power supply for DSI 82*4882a593Smuzhiyun- clocks: handles to fclk and pll clock 83*4882a593Smuzhiyun- clock-names: "fck", "sys_clk" 84*4882a593Smuzhiyun 85*4882a593SmuzhiyunDSI Endpoint required properties: 86*4882a593Smuzhiyun- lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-, 87*4882a593Smuzhiyun DATA1+, DATA1-, ... 88