1*4882a593Smuzhiyun* SM SM501 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe SM SM501 is a LCD controller, with proper hardware, it can also 4*4882a593Smuzhiyundrive DVI monitors. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun- compatible : should be "smi,sm501". 8*4882a593Smuzhiyun- reg : contain two entries: 9*4882a593Smuzhiyun - First entry: System Configuration register 10*4882a593Smuzhiyun - Second entry: IO space (Display Controller register) 11*4882a593Smuzhiyun- interrupts : SMI interrupt to the cpu should be described here. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunOptional properties: 14*4882a593Smuzhiyun- mode : select a video mode: 15*4882a593Smuzhiyun <xres>x<yres>[-<bpp>][@<refresh>] 16*4882a593Smuzhiyun- edid : verbatim EDID data block describing attached display. 17*4882a593Smuzhiyun Data from the detailed timing descriptor will be used to 18*4882a593Smuzhiyun program the display controller. 19*4882a593Smuzhiyun- little-endian: available on big endian systems, to 20*4882a593Smuzhiyun set different foreign endian. 21*4882a593Smuzhiyun- big-endian: available on little endian systems, to 22*4882a593Smuzhiyun set different foreign endian. 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunExample for MPC5200: 25*4882a593Smuzhiyun display@1,0 { 26*4882a593Smuzhiyun compatible = "smi,sm501"; 27*4882a593Smuzhiyun reg = <1 0x00000000 0x00800000 28*4882a593Smuzhiyun 1 0x03e00000 0x00200000>; 29*4882a593Smuzhiyun interrupts = <1 1 3>; 30*4882a593Smuzhiyun mode = "640x480-32@60"; 31*4882a593Smuzhiyun edid = [edid-data]; 32*4882a593Smuzhiyun }; 33