xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/mipi-dsi-bus.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunMIPI DSI (Display Serial Interface) busses
2*4882a593Smuzhiyun==========================================
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunThe MIPI Display Serial Interface specifies a serial bus and a protocol for
5*4882a593Smuzhiyuncommunication between a host and up to four peripherals. This document will
6*4882a593Smuzhiyundefine the syntax used to represent a DSI bus in a device tree.
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunThis document describes DSI bus-specific properties only or defines existing
9*4882a593Smuzhiyunstandard properties in the context of the DSI bus.
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunEach DSI host provides a DSI bus. The DSI host controller's node contains a
12*4882a593Smuzhiyunset of properties that characterize the bus. Child nodes describe individual
13*4882a593Smuzhiyunperipherals on that bus.
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunThe following assumes that only a single peripheral is connected to a DSI
16*4882a593Smuzhiyunhost. Experience shows that this is true for the large majority of setups.
17*4882a593Smuzhiyun
18*4882a593SmuzhiyunDSI host
19*4882a593Smuzhiyun========
20*4882a593Smuzhiyun
21*4882a593SmuzhiyunIn addition to the standard properties and those defined by the parent bus of
22*4882a593Smuzhiyuna DSI host, the following properties apply to a node representing a DSI host.
23*4882a593Smuzhiyun
24*4882a593SmuzhiyunRequired properties:
25*4882a593Smuzhiyun- #address-cells: The number of cells required to represent an address on the
26*4882a593Smuzhiyun  bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
27*4882a593Smuzhiyun  a maximum of 4 devices can be addressed on a single bus. Hence the value of
28*4882a593Smuzhiyun  this property should be 1.
29*4882a593Smuzhiyun- #size-cells: Should be 0. There are cases where it makes sense to use a
30*4882a593Smuzhiyun  different value here. See below.
31*4882a593Smuzhiyun
32*4882a593SmuzhiyunOptional properties:
33*4882a593Smuzhiyun- clock-master: boolean. Should be enabled if the host is being used in
34*4882a593Smuzhiyun  conjunction with another DSI host to drive the same peripheral. Hardware
35*4882a593Smuzhiyun  supporting such a configuration generally requires the data on both the busses
36*4882a593Smuzhiyun  to be driven by the same clock. Only the DSI host instance controlling this
37*4882a593Smuzhiyun  clock should contain this property.
38*4882a593Smuzhiyun
39*4882a593SmuzhiyunDSI peripheral
40*4882a593Smuzhiyun==============
41*4882a593Smuzhiyun
42*4882a593SmuzhiyunPeripherals with DSI as control bus, or no control bus
43*4882a593Smuzhiyun------------------------------------------------------
44*4882a593Smuzhiyun
45*4882a593SmuzhiyunPeripherals with the DSI bus as the primary control bus, or peripherals with
46*4882a593Smuzhiyunno control bus but use the DSI bus to transmit pixel data are represented
47*4882a593Smuzhiyunas child nodes of the DSI host's node. Properties described here apply to all
48*4882a593SmuzhiyunDSI peripherals, but individual bindings may want to define additional,
49*4882a593Smuzhiyundevice-specific properties.
50*4882a593Smuzhiyun
51*4882a593SmuzhiyunRequired properties:
52*4882a593Smuzhiyun- reg: The virtual channel number of a DSI peripheral. Must be in the range
53*4882a593Smuzhiyun  from 0 to 3.
54*4882a593Smuzhiyun
55*4882a593SmuzhiyunSome DSI peripherals respond to more than a single virtual channel. In that
56*4882a593Smuzhiyuncase two alternative representations can be chosen:
57*4882a593Smuzhiyun- The reg property can take multiple entries, one for each virtual channel
58*4882a593Smuzhiyun  that the peripheral responds to.
59*4882a593Smuzhiyun- If the virtual channels that a peripheral responds to are consecutive, the
60*4882a593Smuzhiyun  #size-cells can be set to 1. The first cell of each entry in the reg
61*4882a593Smuzhiyun  property is the number of the first virtual channel and the second cell is
62*4882a593Smuzhiyun  the number of consecutive virtual channels.
63*4882a593Smuzhiyun
64*4882a593SmuzhiyunPeripherals with a different control bus
65*4882a593Smuzhiyun----------------------------------------
66*4882a593Smuzhiyun
67*4882a593SmuzhiyunThere are peripherals that have I2C/SPI (or some other non-DSI bus) as the
68*4882a593Smuzhiyunprimary control bus, but are also connected to a DSI bus (mostly for the data
69*4882a593Smuzhiyunpath). Connections between such peripherals and a DSI host can be represented
70*4882a593Smuzhiyunusing the graph bindings [1], [2].
71*4882a593Smuzhiyun
72*4882a593SmuzhiyunPeripherals that support dual channel DSI
73*4882a593Smuzhiyun-----------------------------------------
74*4882a593Smuzhiyun
75*4882a593SmuzhiyunPeripherals with higher bandwidth requirements can be connected to 2 DSI
76*4882a593Smuzhiyunbusses. Each DSI bus/channel drives some portion of the pixel data (generally
77*4882a593Smuzhiyunleft/right half of each line of the display, or even/odd lines of the display).
78*4882a593SmuzhiyunThe graph bindings should be used to represent the multiple DSI busses that are
79*4882a593Smuzhiyunconnected to this peripheral. Each DSI host's output endpoint can be linked to
80*4882a593Smuzhiyunan input endpoint of the DSI peripheral.
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/graph.txt
83*4882a593Smuzhiyun[2] Documentation/devicetree/bindings/media/video-interfaces.txt
84*4882a593Smuzhiyun
85*4882a593SmuzhiyunExamples
86*4882a593Smuzhiyun========
87*4882a593Smuzhiyun- (1), (2) and (3) are examples of a DSI host and peripheral on the DSI bus
88*4882a593Smuzhiyun  with different virtual channel configurations.
89*4882a593Smuzhiyun- (4) is an example of a peripheral on a I2C control bus connected to a
90*4882a593Smuzhiyun  DSI host using of-graph bindings.
91*4882a593Smuzhiyun- (5) is an example of 2 DSI hosts driving a dual-channel DSI peripheral,
92*4882a593Smuzhiyun  which uses I2C as its primary control bus.
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun1)
95*4882a593Smuzhiyun	dsi-host {
96*4882a593Smuzhiyun		...
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun		#address-cells = <1>;
99*4882a593Smuzhiyun		#size-cells = <0>;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun		/* peripheral responds to virtual channel 0 */
102*4882a593Smuzhiyun		peripheral@0 {
103*4882a593Smuzhiyun			compatible = "...";
104*4882a593Smuzhiyun			reg = <0>;
105*4882a593Smuzhiyun		};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun		...
108*4882a593Smuzhiyun	};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun2)
111*4882a593Smuzhiyun	dsi-host {
112*4882a593Smuzhiyun		...
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun		#address-cells = <1>;
115*4882a593Smuzhiyun		#size-cells = <0>;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun		/* peripheral responds to virtual channels 0 and 2 */
118*4882a593Smuzhiyun		peripheral@0 {
119*4882a593Smuzhiyun			compatible = "...";
120*4882a593Smuzhiyun			reg = <0, 2>;
121*4882a593Smuzhiyun		};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		...
124*4882a593Smuzhiyun	};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun3)
127*4882a593Smuzhiyun	dsi-host {
128*4882a593Smuzhiyun		...
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun		#address-cells = <1>;
131*4882a593Smuzhiyun		#size-cells = <1>;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun		/* peripheral responds to virtual channels 1, 2 and 3 */
134*4882a593Smuzhiyun		peripheral@1 {
135*4882a593Smuzhiyun			compatible = "...";
136*4882a593Smuzhiyun			reg = <1 3>;
137*4882a593Smuzhiyun		};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun		...
140*4882a593Smuzhiyun	};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun4)
143*4882a593Smuzhiyun	i2c-host {
144*4882a593Smuzhiyun		...
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun		dsi-bridge@35 {
147*4882a593Smuzhiyun			compatible = "...";
148*4882a593Smuzhiyun			reg = <0x35>;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun			ports {
151*4882a593Smuzhiyun				...
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun				port {
154*4882a593Smuzhiyun					bridge_mipi_in: endpoint {
155*4882a593Smuzhiyun						remote-endpoint = <&host_mipi_out>;
156*4882a593Smuzhiyun					};
157*4882a593Smuzhiyun				};
158*4882a593Smuzhiyun			};
159*4882a593Smuzhiyun		};
160*4882a593Smuzhiyun	};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun	dsi-host {
163*4882a593Smuzhiyun		...
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun		ports {
166*4882a593Smuzhiyun			...
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun			port {
169*4882a593Smuzhiyun				host_mipi_out: endpoint {
170*4882a593Smuzhiyun					remote-endpoint = <&bridge_mipi_in>;
171*4882a593Smuzhiyun				};
172*4882a593Smuzhiyun			};
173*4882a593Smuzhiyun		};
174*4882a593Smuzhiyun	};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun5)
177*4882a593Smuzhiyun	i2c-host {
178*4882a593Smuzhiyun		dsi-bridge@35 {
179*4882a593Smuzhiyun			compatible = "...";
180*4882a593Smuzhiyun			reg = <0x35>;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun			ports {
183*4882a593Smuzhiyun				#address-cells = <1>;
184*4882a593Smuzhiyun				#size-cells = <0>;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun				port@0 {
187*4882a593Smuzhiyun					reg = <0>;
188*4882a593Smuzhiyun					dsi0_in: endpoint {
189*4882a593Smuzhiyun						remote-endpoint = <&dsi0_out>;
190*4882a593Smuzhiyun					};
191*4882a593Smuzhiyun				};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun				port@1 {
194*4882a593Smuzhiyun					reg = <1>;
195*4882a593Smuzhiyun					dsi1_in: endpoint {
196*4882a593Smuzhiyun						remote-endpoint = <&dsi1_out>;
197*4882a593Smuzhiyun					};
198*4882a593Smuzhiyun				};
199*4882a593Smuzhiyun			};
200*4882a593Smuzhiyun		};
201*4882a593Smuzhiyun	};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun	dsi0-host {
204*4882a593Smuzhiyun		...
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun		/*
207*4882a593Smuzhiyun		 * this DSI instance drives the clock for both the host
208*4882a593Smuzhiyun		 * controllers
209*4882a593Smuzhiyun		 */
210*4882a593Smuzhiyun		clock-master;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun		ports {
213*4882a593Smuzhiyun			...
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun			port {
216*4882a593Smuzhiyun				dsi0_out: endpoint {
217*4882a593Smuzhiyun					remote-endpoint = <&dsi0_in>;
218*4882a593Smuzhiyun				};
219*4882a593Smuzhiyun			};
220*4882a593Smuzhiyun		};
221*4882a593Smuzhiyun	};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun	dsi1-host {
224*4882a593Smuzhiyun		...
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun		ports {
227*4882a593Smuzhiyun			...
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun			port {
230*4882a593Smuzhiyun				dsi1_out: endpoint {
231*4882a593Smuzhiyun					remote-endpoint = <&dsi1_in>;
232*4882a593Smuzhiyun				};
233*4882a593Smuzhiyun			};
234*4882a593Smuzhiyun		};
235*4882a593Smuzhiyun	};
236