1*4882a593SmuzhiyunExynos MIPI DSI Master 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun - compatible: value should be one of the following 5*4882a593Smuzhiyun "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */ 6*4882a593Smuzhiyun "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */ 7*4882a593Smuzhiyun "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */ 8*4882a593Smuzhiyun "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */ 9*4882a593Smuzhiyun "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */ 10*4882a593Smuzhiyun - reg: physical base address and length of the registers set for the device 11*4882a593Smuzhiyun - interrupts: should contain DSI interrupt 12*4882a593Smuzhiyun - clocks: list of clock specifiers, must contain an entry for each required 13*4882a593Smuzhiyun entry in clock-names 14*4882a593Smuzhiyun - clock-names: should include "bus_clk"and "sclk_mipi" entries 15*4882a593Smuzhiyun the use of "pll_clk" is deprecated 16*4882a593Smuzhiyun - phys: list of phy specifiers, must contain an entry for each required 17*4882a593Smuzhiyun entry in phy-names 18*4882a593Smuzhiyun - phy-names: should include "dsim" entry 19*4882a593Smuzhiyun - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V) 20*4882a593Smuzhiyun - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V) 21*4882a593Smuzhiyun - samsung,pll-clock-frequency: specifies frequency of the oscillator clock 22*4882a593Smuzhiyun - #address-cells, #size-cells: should be set respectively to <1> and <0> 23*4882a593Smuzhiyun according to DSI host bindings (see MIPI DSI bindings [1]) 24*4882a593Smuzhiyun - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst 25*4882a593Smuzhiyun mode 26*4882a593Smuzhiyun - samsung,esc-clock-frequency: specifies DSI frequency in escape mode 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunOptional properties: 29*4882a593Smuzhiyun - power-domains: a phandle to DSIM power domain node 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunChild nodes: 32*4882a593Smuzhiyun Should contain DSI peripheral nodes (see MIPI DSI bindings [1]). 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunVideo interfaces: 35*4882a593Smuzhiyun Device node can contain following video interface port nodes according to [2]: 36*4882a593Smuzhiyun 0: RGB input, 37*4882a593Smuzhiyun 1: DSI output 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun[1]: Documentation/devicetree/bindings/display/mipi-dsi-bus.txt 40*4882a593Smuzhiyun[2]: Documentation/devicetree/bindings/media/video-interfaces.txt 41*4882a593Smuzhiyun 42*4882a593SmuzhiyunExample: 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun dsi@11c80000 { 45*4882a593Smuzhiyun compatible = "samsung,exynos4210-mipi-dsi"; 46*4882a593Smuzhiyun reg = <0x11C80000 0x10000>; 47*4882a593Smuzhiyun interrupts = <0 79 0>; 48*4882a593Smuzhiyun clocks = <&clock 286>, <&clock 143>; 49*4882a593Smuzhiyun clock-names = "bus_clk", "sclk_mipi"; 50*4882a593Smuzhiyun phys = <&mipi_phy 1>; 51*4882a593Smuzhiyun phy-names = "dsim"; 52*4882a593Smuzhiyun vddcore-supply = <&vusb_reg>; 53*4882a593Smuzhiyun vddio-supply = <&vmipi_reg>; 54*4882a593Smuzhiyun power-domains = <&pd_lcd0>; 55*4882a593Smuzhiyun #address-cells = <1>; 56*4882a593Smuzhiyun #size-cells = <0>; 57*4882a593Smuzhiyun samsung,pll-clock-frequency = <24000000>; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun panel@1 { 60*4882a593Smuzhiyun reg = <0>; 61*4882a593Smuzhiyun ... 62*4882a593Smuzhiyun port { 63*4882a593Smuzhiyun panel_ep: endpoint { 64*4882a593Smuzhiyun remote-endpoint = <&dsi_ep>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun ports { 70*4882a593Smuzhiyun #address-cells = <1>; 71*4882a593Smuzhiyun #size-cells = <0>; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun port@0 { 74*4882a593Smuzhiyun reg = <0>; 75*4882a593Smuzhiyun decon_to_mic: endpoint { 76*4882a593Smuzhiyun remote-endpoint = <&mic_to_decon>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun port@1 { 81*4882a593Smuzhiyun reg = <1>; 82*4882a593Smuzhiyun dsi_ep: endpoint { 83*4882a593Smuzhiyun reg = <0>; 84*4882a593Smuzhiyun samsung,burst-clock-frequency = <500000000>; 85*4882a593Smuzhiyun samsung,esc-clock-frequency = <20000000>; 86*4882a593Smuzhiyun remote-endpoint = <&panel_ep>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun }; 91