1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Toshiba TC358775 DSI to LVDS bridge bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Vinay Simha BN <simhavcs@gmail.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun This binding supports DSI to LVDS bridge TC358775 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane. 16*4882a593Smuzhiyun Video frame size: 17*4882a593Smuzhiyun Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel 18*4882a593Smuzhiyun limited by 135 MHz LVDS speed 19*4882a593Smuzhiyun Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display 20*4882a593Smuzhiyun panel, limited by 270 MHz LVDS speed. 21*4882a593Smuzhiyun 22*4882a593Smuzhiyunproperties: 23*4882a593Smuzhiyun compatible: 24*4882a593Smuzhiyun const: toshiba,tc358775 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun reg: 27*4882a593Smuzhiyun maxItems: 1 28*4882a593Smuzhiyun description: i2c address of the bridge, 0x0f 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun vdd-supply: 31*4882a593Smuzhiyun maxItems: 1 32*4882a593Smuzhiyun description: 1.2V LVDS Power Supply 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun vddio-supply: 35*4882a593Smuzhiyun maxItems: 1 36*4882a593Smuzhiyun description: 1.8V IO Power Supply 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun stby-gpios: 39*4882a593Smuzhiyun maxItems: 1 40*4882a593Smuzhiyun description: Standby pin, Low active 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun reset-gpios: 43*4882a593Smuzhiyun maxItems: 1 44*4882a593Smuzhiyun description: Hardware reset, Low active 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun ports: 47*4882a593Smuzhiyun type: object 48*4882a593Smuzhiyun description: 49*4882a593Smuzhiyun A node containing input and output port nodes with endpoint definitions 50*4882a593Smuzhiyun as documented in 51*4882a593Smuzhiyun Documentation/devicetree/bindings/media/video-interfaces.txt 52*4882a593Smuzhiyun properties: 53*4882a593Smuzhiyun "#address-cells": 54*4882a593Smuzhiyun const: 1 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun "#size-cells": 57*4882a593Smuzhiyun const: 0 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun port@0: 60*4882a593Smuzhiyun type: object 61*4882a593Smuzhiyun description: | 62*4882a593Smuzhiyun DSI Input. The remote endpoint phandle should be a 63*4882a593Smuzhiyun reference to a valid mipi_dsi_host device node. 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun port@1: 66*4882a593Smuzhiyun type: object 67*4882a593Smuzhiyun description: | 68*4882a593Smuzhiyun Video port for LVDS output (panel or connector). 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun port@2: 71*4882a593Smuzhiyun type: object 72*4882a593Smuzhiyun description: | 73*4882a593Smuzhiyun Video port for Dual link LVDS output (panel or connector). 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun required: 76*4882a593Smuzhiyun - port@0 77*4882a593Smuzhiyun - port@1 78*4882a593Smuzhiyun 79*4882a593Smuzhiyunrequired: 80*4882a593Smuzhiyun - compatible 81*4882a593Smuzhiyun - reg 82*4882a593Smuzhiyun - vdd-supply 83*4882a593Smuzhiyun - vddio-supply 84*4882a593Smuzhiyun - stby-gpios 85*4882a593Smuzhiyun - reset-gpios 86*4882a593Smuzhiyun - ports 87*4882a593Smuzhiyun 88*4882a593SmuzhiyunadditionalProperties: false 89*4882a593Smuzhiyun 90*4882a593Smuzhiyunexamples: 91*4882a593Smuzhiyun - | 92*4882a593Smuzhiyun #include <dt-bindings/gpio/gpio.h> 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun /* For single-link LVDS display panel */ 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun i2c@78b8000 { 97*4882a593Smuzhiyun /* On High speed expansion */ 98*4882a593Smuzhiyun label = "HS-I2C2"; 99*4882a593Smuzhiyun reg = <0x078b8000 0x500>; 100*4882a593Smuzhiyun clock-frequency = <400000>; /* fastmode operation */ 101*4882a593Smuzhiyun #address-cells = <1>; 102*4882a593Smuzhiyun #size-cells = <0>; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun tc_bridge: bridge@f { 105*4882a593Smuzhiyun compatible = "toshiba,tc358775"; 106*4882a593Smuzhiyun reg = <0x0f>; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun vdd-supply = <&pm8916_l2>; 109*4882a593Smuzhiyun vddio-supply = <&pm8916_l6>; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>; 112*4882a593Smuzhiyun reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun ports { 115*4882a593Smuzhiyun #address-cells = <1>; 116*4882a593Smuzhiyun #size-cells = <0>; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun port@0 { 119*4882a593Smuzhiyun reg = <0>; 120*4882a593Smuzhiyun d2l_in_test: endpoint { 121*4882a593Smuzhiyun remote-endpoint = <&dsi0_out>; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun port@1 { 126*4882a593Smuzhiyun reg = <1>; 127*4882a593Smuzhiyun lvds_out: endpoint { 128*4882a593Smuzhiyun remote-endpoint = <&panel_in>; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun dsi@1a98000 { 136*4882a593Smuzhiyun reg = <0x1a98000 0x25c>; 137*4882a593Smuzhiyun reg-names = "dsi_ctrl"; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun ports { 140*4882a593Smuzhiyun #address-cells = <1>; 141*4882a593Smuzhiyun #size-cells = <0>; 142*4882a593Smuzhiyun port@1 { 143*4882a593Smuzhiyun reg = <1>; 144*4882a593Smuzhiyun dsi0_out: endpoint { 145*4882a593Smuzhiyun remote-endpoint = <&d2l_in_test>; 146*4882a593Smuzhiyun data-lanes = <0 1 2 3>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun - | 153*4882a593Smuzhiyun /* For dual-link LVDS display panel */ 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun i2c@78b8000 { 156*4882a593Smuzhiyun /* On High speed expansion */ 157*4882a593Smuzhiyun label = "HS-I2C2"; 158*4882a593Smuzhiyun reg = <0x078b8000 0x500>; 159*4882a593Smuzhiyun clock-frequency = <400000>; /* fastmode operation */ 160*4882a593Smuzhiyun #address-cells = <1>; 161*4882a593Smuzhiyun #size-cells = <0>; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun tc_bridge_dual: bridge@f { 164*4882a593Smuzhiyun compatible = "toshiba,tc358775"; 165*4882a593Smuzhiyun reg = <0x0f>; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun vdd-supply = <&pm8916_l2>; 168*4882a593Smuzhiyun vddio-supply = <&pm8916_l6>; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>; 171*4882a593Smuzhiyun reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun ports { 174*4882a593Smuzhiyun #address-cells = <1>; 175*4882a593Smuzhiyun #size-cells = <0>; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun port@0 { 178*4882a593Smuzhiyun reg = <0>; 179*4882a593Smuzhiyun d2l_in_dual: endpoint { 180*4882a593Smuzhiyun remote-endpoint = <&dsi0_out_dual>; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun port@1 { 185*4882a593Smuzhiyun reg = <1>; 186*4882a593Smuzhiyun lvds0_out: endpoint { 187*4882a593Smuzhiyun remote-endpoint = <&panel_in0>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun port@2 { 192*4882a593Smuzhiyun reg = <2>; 193*4882a593Smuzhiyun lvds1_out: endpoint { 194*4882a593Smuzhiyun remote-endpoint = <&panel_in1>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun dsi@1a98000 { 202*4882a593Smuzhiyun reg = <0x1a98000 0x25c>; 203*4882a593Smuzhiyun reg-names = "dsi_ctrl"; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun ports { 206*4882a593Smuzhiyun #address-cells = <1>; 207*4882a593Smuzhiyun #size-cells = <0>; 208*4882a593Smuzhiyun port@1 { 209*4882a593Smuzhiyun reg = <1>; 210*4882a593Smuzhiyun dsi0_out_dual: endpoint { 211*4882a593Smuzhiyun remote-endpoint = <&d2l_in_dual>; 212*4882a593Smuzhiyun data-lanes = <0 1 2 3>; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun... 218